V380SDC Просмотр технического описания (PDF) - QuickLogic Corporation

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V380SDC

High Performance SDRAM Controller for 32-bit and 64-bit Embedded Processors

QuickLogic Corporation 

V380SDC A0 Datasheet

V380SDC High Performance SDRAM Controller

for 32-bit and 64-bit Embedded Processors

1.0 About the V380SDC

w Direct interface to these processors:

• AMD® AM29030/40™

• IBM® PowerPC 401™ Gx

• IDT® 79RC32364™

• Intel® i960® Cx/Hx/Jx/Rx/Vx

• Motorola® M68040™ and 68K/ColdFire®

• PowerPC™ 750/60x

w Up to 75 MHz local bus clock

w Up to 2 Kbytes of continuous burst access for

64-bit processors and 1 Kbyte for 32-bit

processors

w Zero-wait-state bursting

w Dynamic bus protocol switching

w User-customized processor bus interface

w Support for up to 2 Gbytes of (Enhanced)

SDRAM

w Compatible with PC66, PC100, PC133 SDRAM

w Supports a wide range of synchronous DRAMs,

from 16 Mbit to 256 Mbit

w Support for up to 4 single-bank or 2 dual-bank

industry standard 168-pin SDRAM DIMM(s) or

144-pin SO-DIMM(s)

w I2C EEPROM interface for Serial Presence

Detect (SPD) on DIMM

w Optional EEPROM initialization

w 8-bit bus watch timer

w System heartbeat and watchdog timers

w Two 32-bit general purpose timers with pulse-

width modulation capability—useful for RTOS

w 16-bytes of general purpose registers

w Designed to work with the EPC family of PCI

bridges from V3 Semiconductor

w 3.3 V operation with 5 V tolerant inputs

w Industrial temperature range (−40°C to +85°C)

w Low-cost 100-pin PQFP package

© 2000 V3 Semiconductor Corp.

V380SDC_A0 Datasheet Rev 1.01 DS-SD01-0101

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