GAL22V10C-10LJ Просмотр технического описания (PDF) - Lattice Semiconductor
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производитель
GAL22V10C-10LJ Datasheet PDF : 29 Pages
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Specifications GAL22V10
GAL22V10 Logic Diagram / JEDEC Fuse Map
DIP (PLCC) Package Pinouts
1 (2)
0
4
8
12 16 20 24 28
32 36 40
0000
0044
.
.
8
.
0396
0440
.
.
10
.
.
0880
2 (3)
0924
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.
12
.
.
.
1452
3 (4)
1496
.
.
.
14
.
.
.
2112
4 (5)
2156
.
.
.
.
16
.
.
.
2860
5 (6)
2904
.
.
.
.
16
.
.
.
3608
6 (7)
3652
.
.
.
14
.
.
.
4268
7 (9)
4312
.
.
.
12
.
.
4840
8 (10)
4884
.
.
10
.
.
5324
9 (11)
5368
.
8
.
.
5720
10 (12)
5764
11 (13)
5828, 5829 ... Electronic Signature ... 5890, 5891
Byte 7 Byte 6 Byte 5 Byte 4 Byte 3 Byte 2 Byte 1 Byte 0
ML
SS
BB
ASYNCHRONOUS RESET
(TO ALL REGISTERS)
OLMC
S0
5808
S1
5809
23 (27)
OLMC
S0
5810
S1
5811
22 (26)
OLMC
S0
5812
S1
5813
21 (25)
OLMC
S0
5814
S1
5815
20 (24)
OLMC
S0
5816
S1
5817
19 (23)
OLMC
S0
5818
S1
5819
18 (21)
OLMC
S0
5820
S1
5821
17 (20)
OLMC
S0
5822
S1
5823
16 (19)
OLMC
S0
5824
S1
5825
15 (18)
OLMC
S0
5826
S1
5827
SYNCHRONOUS PRESET
(TO ALL REGISTERS)
14 (17)
13 (16)
5
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