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MC44602

HIGH PERFORMANCE CURRENT MODE CONTROLLER

ON Semiconductor 

MC44602

OPERATING DESCRIPTION

The MC44602 is a high performance, fixed frequency,

current mode controller specifically designed to directly drive

a bipolar power switch in off–line and high voltage dc–to–dc

converter applications. This device offers the designer a cost

effective solution with minimal external components. The

representative block and timing diagrams are shown in

Figures 27 and 28.

Oscillator

The oscillator frequency is programmed by the values

selected for the timing components RT and CT. Capacitor CT

is charged from the 5.0 V reference through resistor RT to

approximately 2.8 V and discharged to 1.2 V by an internal

current sink. During the discharge of CT, the oscillator

generates an internal blanking pulse that holds one of the

inputs of the NOR gate high. This causes the Source and

Sink outputs to be in a low state, thus producing a controlled

amount of output deadtime. An internal toggle flip–flop has

been incorporated in the MC44602 which blanks the output

off every other clock cycle by holding one of the inputs of the

NOR gate high. This in combination with the CT discharge

period yields output deadtimes programmable from 50% to

70%. Figure 1 shows RT versus Oscillator Frequency and

Figure 2, Output Deadtime versus Frequency, both for a

given value of CT. Note that many values of RT and CT will

give the same oscillator frequency but only one combination

will yield a specific output deadtime at a given frequency.

In many noise sensitive applications it may be desirable to

frequency–lock the converter to an external system clock.

This can be accomplished by applying a narrow rectangular

clock signal with an amplitude of 3.2 V to 5.5 V to the Sync

Input (Pin 7). For reliable locking, the free–running oscillator

frequency should be set about 10% less than the clock

frequency. If the clock signal is ac coupled through a

capacitor, an external clamp diode may be required if the

negative sync input current is greater than –5.0 mA.

Connecting Pin 7 to Vref will cause CT to discharge to 0 V,

inhibiting the Oscillator and conduction of the Source Output.

Multi–unit synchronization can be accomplished by

connecting the CT pin of each IC to a single MC1455 timer.

Error Amplifier

A fully compensated Error Amplifier with access to the

inverting input and output is provided. It features a typical dc

voltage gain of 90 dB, and a unity gain bandwith of

1.0 MHz with 57 degrees of phase margin (Figure 7). The

noninverting input is internally biased at 2.5 V and is not

pinned out. The converter output voltage is typically divided

down and monitored by the inverting input. The maximum

input bias current with the inverting input at 2.5 V is –2.0 µA.

This can cause an output voltage error that is equal to the

product of the input bias current and the equivalent input

divider source resistance.

The Error Amp Output (Pin 1) is provided for external loop

compensation (Figure 29). The output voltage is offset by two

diodes drops (≈1.4 V) and divided by three before it connects

to the inverting input of the Current Sense Comparator. This

guarantees that no drive pulses appear at the Source Output

(Pin 11) when Pin 1 is at its lowest state (VOL). This occurs

when the power supply is operating and the load is removed,

or at the beginning of a soft–start interval. The Error Amp

minimum feedback resistance is limited by the amplifier’s

minimum source current (0.5 mA) and the required output

voltage (VOH) to reach the comparator’s 1.0 V clamp level:

[ ) + Rf(min)

3.0 (1.0 V) 1.4 V

0.5mA

8800 W

Figure 29. Error Amplifier Compensation

Compensation

+

1.0 mA

RFB

1

Cf

Rf

3 2.5V

Voltage

Feedback

Input

Error

Amplifier

2R

Foldback

I

Amplifier

R

Current Sense

Comparator

2.5V

1.0V

Gnd 9

From Power Supply Output

R1

R2

Current Sense Comparator and PWM Latch

The MC44602 operates as a current mode controller,

where output switch conduction is initiated by the oscillator

and terminated when the peak inductor current reaches the

threshold level established by the Error Amplifier output (Pin

1). Thus the error signal controls the peak inductor current on

a cycle–by–cycle basis. The Current Sense Comparator

PWM Latch configuration used ensures that only a single

pulse appears at the Source Output during the appropriate

oscillator cycle. The inductor current is converted to a voltage

by inserting the ground referenced sense resistor RS in series

with the emitter of output switch Q1. This voltage is monitored

by the Current Sense Input (Pin 6) and compared to a level

derived from the Error Amp output. The peak inductor current

under normal operating conditions is controlled by the

voltage at Pin 1 where:

[ * lpk

V (Pin1) 1.4V

3 RS

Abnormal operating conditions occur when the power

supply output is overloaded or if output voltage sensing is

lost. Under these conditions, the Current Sense Comparator

threshold will be internally clamped to 1.0 V. Therefore the

maximum peak switch current is:

[ lpk(max)

1.0 V

RS

10

MOTOROLA ANALOG IC DEVICE DATA

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