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MC33129

High Performance Current Mode Controllers

Motorola => Freescale 

FreescalMeCS34e1m29iMcCo3n3d1u29ctor, Inc.

Fault Timer

This unique circuit prevents sustained operating in a

lockout condition. This can occur with conventional switching

control ICs when operating from a power source with a high

series impedance. If the power required by the load is greater

than that available from the source, the input voltage will

collapse, causing the lockout condition. The Fault Timer

provides automatic recovery when this condition is detected.

Under normal operating conditions, the output of the PWM

Comparator will reset the Latch and discharge the internal

Fault Timer capacitor on a cycle–by–cycle basis. Under

operating conditions where the required power into the load is

greater than that available from the source (Vin), the Ramp

Input voltage (plus offset) will not reach the comparator

threshold level (Pin 11), and the output of the PWM

Comparator will remain low. If this condition persists for more

that 600 µs, the Fault Timer will active, discharging CSoft–Start

and initiating a soft–start cycle. The power supply will operate

in a skip cycle or hiccup mode until either the load power or

source impedance is reduced. The minimum fault timeout is

200 µs, which limits the useful switching frequency to a

minimum of 5.0 kHz.

Start/Run Comparator

A bootstrap startup circuit is included to improve system

efficiency when operating from a high input voltage. The

output of the Start/Run Comparator controls the state of an

external transistor. A typical application is shown in Figure 21.

While CSoft–Start is charging, startup bias is supplied to VCC

(Pin 14) from Vin through transistor Q2. When

CSoft–Start reaches the 1.95 V clamp level, the Start–Run

output switches low (VCC = 50 mV), turning off Q2. Operating

bias is now derived from the auxiliary bootstrap winding of the

transformer, and all drive power is efficiently converted down

from Vin. The start time must be long enough for the power

supply output to reach regulation. This will ensure that there

is sufficient bias voltage at the auxiliary bootstrap winding for

sustained operation.

tStart =

1.95 V CSoft–Start

1.0 µA

=

1.95

CSoft–Start

in

µF

The Start/Run Comparator has 350 mV of hysteresis. The

output off–state is clamped to VCC + 7.6 V by the internal

zener and PNP transistor base–emitter junction.

Drive Output and Drive Ground

The MC34129 contains a single totem–pole output stage

that was specifically designed for direct drive of power

MOSFETs. It is capable of up to ±1.0 A peak drive current and

has a typical fall time of 30 ns with a 500 pF load. The

totem–pole stage consists of an NPN transistor for turn–on

drive and a high speed SCR for turn–off. The SCR design

requires less average supply current (ICC) when compared to

conventional switching control ICs that use an all NPN

totem–pole. The SCR accomplishes this during turn–off of

the MOSFET, by utilizing the gate charge as regenerative

on–bias, whereas the conventional all transistor design

requires continuous base current. Conversion efficiency in

low power applications is greatly enhanced with this

reduction of ICC. The SCR’s low–state holding current (IH) is

typically 225 µA. An internal 225 kΩ pull–down resistor is

included to shunt the Drive Output off–state leakage to

ground when the Undervoltage Lockout is active. A separate

Drive Ground is provided to reduce the effects of switching

transient noise imposed on the Ramp Input. This feature

becomes particularly useful when the Ipk(max) clamp level is

reduced. Figure 24 shows the proper implementation of the

MC34129 with a current sensing power MOSFET.

Undervoltage Lockout

The Undervoltage Lockout comparator holds the Drive

Output and CSoft–Start pins in the low state when VCC is less

than 3.6 V. This ensures that the MC34129 is fully functional

before the output stage is enabled and a soft–start cycle

begins. A built–in hysteresis of 350 mV prevents erratic

output behavior as VCC crosses the comparator threshold

voltage. A 14.3 V zener is connected as a shunt regulator

from VCC to ground. Its purpose is to protect the MOSFET

gate from excessive drove voltage during system startup. An

external 9.1 V zener is required when driving low threshold

MOSFETs. Refer to Figure 21. The minimum operating

voltage range of the IC is 4.2 V to 12 V.

References

The 1.25 V bandgap reference is trimmed to ±2.0%

tolerance at TA = 25°C. It is intended to be used in

conjunction with the Error Amp. The 2.50 V reference is

derived from the 1.25 V reference by an internal op amp with

a fixed gain of 2.0. It has an output tolerance of ±5.0% at TA =

25°C and its primary purpose is to supply charging current to

the oscillator timing capacitor.

For further information, please refer to AN976.

10

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