ADP3020 Просмотр технического описания (PDF) - Analog Devices

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ADP3020

High-Efficiency Notebook Computer Power Supply Controller

Analog Devices 

ADP3020

The compensation network consists of the internal error ampli-

fier and two external impedance networks ZIN and ZFB. Once the

application and the output filter capacitance and ESR are chosen,

the specific component values of the external impedance net-

works ZIN and ZFB can be determined. There are two design

criteria for achieving stable switching regulator behavior within

the line and load range. One is the maximum bandwidth of the

loop, which affects fast transient response, if needed, and the

other is the minimum accepted by the design phase margin.

The phase margin is the difference between the closed-loop phase

and 180 degrees. Recommended phase margin is 45 to 60 degrees

for most applications.

The equations for calculating the compensation Poles and Zeros

are:

fP1

=

2π

×

1

R2 × C1 × C2

(20)

C1 + C2

fP2

=

2π

1

× R3 × C3

(21)

fZ1

=

2π

×

1

R2 × C1

(22)

fZ2

=

2π

1

× (R1 + R3) × C3

(23)

The value of the internal resistor R1 is 71 kΩ for the 3.3 V

switching regulator, and 128 kΩ for the 5 V switching regulator.

Compensation Loop Design and Test Method

1. Choose the gain (R2/R1) for the desired bandwidth.

2. Place fZ1 20%–30% below fLC.

3. Place fZ2 20%–30% above fLC.

4. Place fP1 at fESR, check the output capacitor for worst-case ESR

tolerances.

5. Place fP2 at 40%–60% of oscillator frequency.

6. Estimate phase margins in full frequency range (zero frequency

to zero gain crossing frequency).

7. Apply the designed compensation and test the transient

response under a moderate step load change (30%–60%) and

various input voltages. Monitor the output voltage via

oscilloscope. The voltage overshoot or undershoot should be

within 1%–3% of the nominal output, without ringing and

abnormal oscillation.

Additional Application Circuits

The multiple outputs and wide input voltage range of the ADP3020

make it a very flexible IC for use in a wide variety of applications.

For example, the ADP3020 can be used to generate low voltage

(<4.0 V) outputs from a 5 V supply. The circuit shown in Fig-

ure 21 converts the 5 V input into a 3.3 V and a 2.5 V output.

The circuit of Figure 22 uses a secondary winding on the 5 V

output to generate an unregulated 15 V rail which is then regu-

lated to 12 V by the LDO output of the ADP3020.

–18–

REV. 0

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