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LT1308ACFTR Просмотр технического описания (PDF) - Linear Technology

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LT1308ACFTR Datasheet PDF : 20 Pages
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LT1308A/LT1308B
APPLICATIONS INFORMATION
Waveforms for a LT1308B 5V to 12V boost converter using
a 10μF ceramic output capacitor are pictured in Figures 4
and 5. In Figure 4, the converter is operating in continuous
mode, delivering a load current of approximately 500mA.
The top trace is the output. The voltage increases as induc-
tor current is dumped into the output capacitor during the
switch off time, and the voltage decreases when the switch
is on. Ripple voltage is in this case due to capacitance,
as the ceramic capacitor has little ESR. The middle trace
is the switch voltage. This voltage alternates between a
VCESAT and VOUT plus the diode drop. The lower trace is
the switch current. At the beginning of the switch cycle,
the current is 1.2A. At the end of the switch on time, the
current has increased to 2A, at which point the switch turns
off and the inductor current flows into the output capacitor
through the diode. Figure 5 depicts converter waveforms
at a light load. Here the converter operates in discontinu-
ous mode. The inductor current reaches zero during the
switch off time, resulting in some ringing at the switch
node. The ring frequency is set by switch capacitance,
diode capacitance and inductance. This ringing has little
energy, and its sinusoidal shape suggests it is free from
harmonics. Minimizing the copper area at the switch node
will prevent this from causing interference problems.
LAYOUT HINTS
The LT1308A/LT1308B switch current at high speed, man-
dating careful attention to layout for proper performance.
You will not get advertised performance with careless
layout. Figure 6 shows recommended component place-
ment for an SO-8 package boost (step-up) converter. Follow
this closely in your PC layout. Note the direct path of the
switching loops. Input capacitor C1 must be placed close
(< 5mm) to the IC package. As little as 10mm of wire or PC
trace from CIN to VIN will cause problems such as inability
to regulate or oscillation.
The negative terminal of output capacitor C2 should tie
close to the ground pin(s) of the LT1308A/LT1308B. Doing
this reduces dI/dt in the ground copper which keeps high
frequency spikes to a minimum. The DC/DC converter
ground should tie to the PC board ground plane at one place
only, to avoid introducing dI/dt in the ground plane.
GROUND PLANE
LBI LBO
C1
+
VIN
VOUT
100mV/DIV
VSW
10V/DIV
ISW
500mA/DIV
500ns/DIV
1308 F04
Figure 4. 5V to 12V Boost Converter Waveforms in
Continuous Mode. 10μF Ceramic Capacitor Used at Output
VOUT
20mV/DIV
VSW
10V/DIV
ISW
500mA/DIV
500ns/DIV
1308 F05
Figure 5. Converter Waveforms in Discontinuous Mode
R1
1
8
R2
2 LT1308A
7
L1
SHUTDOWN
3 LT1308B
6
4
5
MULTIPLE
VIAs
GND
+
C2
D1
VOUT
1308 F04
Figure 6. Recommended Component Placement for SO-8
Package Boost Converter. Note Direct High Current Paths
Using Wide PC Traces. Minimize Trace Area at Pin 1 (VC) and
Pin 2 (FB). Use Multiple Vias to Tie Pin 4 Copper to Ground
Plane. Use Vias at One Location Only to Avoid Introducing
Switching Currents into the Ground Plane
Figure 7 shows recommended component placement for
a boost converter using the TSSOP package. Placement
is similar to the SO-8 package layout.
1308abfb
9

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