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ZXFV401 Просмотр технического описания (PDF) - Zetex => Diodes

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Компоненты Описание
производитель
ZXFV401
Zetex
Zetex => Diodes Zetex
ZXFV401 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
ZXFV401
CONNECTIONS
PIN No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
PIN NAME TYPE
FUNCTION
RFILT
Resistor
control
Controls the input colour carrier filter characteristic. An external
resistor RFILT connected from this pin to 0V sets the bandwidth.
Smaller RFILT gives increased bandwidth. See the detailed operating
description below.
RNOSIG
CSYNC
FILTIN
VAYNC
OVD
FILTOUT
FVIDIN
VLEV
NOSIG
BKPCH
RSET
ODDFLD
V+
Resistor
control
Logic out
Controls the no-signal
connected from this pin
detector
to 0V sets
ltehveetlh. reAsnhoeldxtveornltaalgerelseivsetol,racRcNoOrdSinIGg
to the equation
VPMIN = 0.75 RNOSIG / RSET
where VPMIN is the minimum detected sync pulse amplitude at pin 4
and RSET is the resistor value at pin 12.
Composite sync logic output. Includes all sync pulses derived from the
input video.
Input to colour carrier filter. This is the main analog (unfiltered)
Analog in
composite video input used when colour carrier filtering is required. A
voltage clamp circuit and adaptive current source are also included at
this node. See the detailed operating description.
Vertical sync output. This is an active low pulse commencing on the first
Logic out vertical sync pulse trailing (rising) edge and ending near the second
next equalising pulse. See timing diagram.
Ground
Provides ground return path for internal logic output buffer circuits.
Normally connected externally to a common PCB ground plane.
Analog
out
Analog output signal from colour carrier filter. The filter voltage gain is
nominally 2. This output is normally capacitor-coupled to pin 8.
Analog in
Input for filtered analog video signal input. This is the direct input to the
sample/hold and sync slicing comparator providing the logic timing
edges. This input is normally coupled via an external capacitor from
FILTOUT, pin 7. It may be used as the signal input where the colour
carrier filter is not required. Includes a clamp similar that of pin 4.
Analog
out
Analog output, a positive voltage typically equal to twice the (negative)
peak sync pulse amplitude if the filter is used.
Logic out
Logic output, which goes high after a time-out delay when no signal is
present. The threshold level is controlled at pin 2.
Logic out
Burst or Back Porch logic output, an active low monostable pulse
triggered from rising composite sync pulse edges. The width is set by
RSET to overlap most of the steady part of the back porch, assuming the
colour carrier burst has been attenuated sufficiently by filtering. This
pulse is then suitable for controlling an external black level clamping
circuit. See the timing diagram.
Resistor
control
Controls the timing interval of the sample/hold circuit and the
monostable interval for the sync outputs according to the application.
An external resistor, RSET connected from this pin to 0V establishes the
timing parameter, to which these times are scaled together. See the
detailed operating description.
Logic out
Odd field logic output. High during an odd numbered field, low during
even. This output is timed with the start of the VSYNC pulse.
Power in Power supply input, +5V.
HSYNC
OVA
Logic out
Ground
Horizontal sync logic output. Monostable output derived from CSYNC
falling edges, it achieves a steady stream of 5µs pulses. The half line
events during the field blanking interval are eliminated. See timing
diagram.
Analog ground. Normally connected externally to a common PCB
ground plane.
PROVISIONAL ISSUE A - FEBRUARY 2002
4

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