CX28HC64DMB-12(2006) Просмотр технического описания (PDF) - Intersil

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производитель

CX28HC64DMB-12
(Rev.:2006)

5 Volt, Byte Alterable EEPROM

Intersil 

THE TOGGLE BIT I/O6

Figure 4. Toggle Bit Bus Sequence

Last

WE Write

X28HC64

CE

OE

I/O6

VOH

*

VOL

* Beginning and ending state of I/O6 will vary.

Figure 5. Toggle Bit Software Flow

Last Write

Yes

Load Accum

From Addr N

Compare

Accum with

Addr N

HIGH Z

*

X28HC64

Ready

The Toggle Bit can eliminate the chore of saving and

fetching the last address and data in order to implement

DATA Polling. This can be especially helpful in an array

comprised of multiple X28HC64 memories that is fre-

quently updated. Toggle Bit Polling can also provide a

method for status checking in multiprocessor applica-

tions. The timing diagram in Figure 4 illustrates the

sequence of events on the bus. The software flow dia-

gram in Figure 5 illustrates a method for polling the

Toggle Bit.

Compare

No

Ok?

Yes

Ready

7

FN8109.1

June 7, 2006

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