SP8855D Просмотр технического описания (PDF) - Zarlink Semiconductor Inc

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производитель

SP8855D

1.7GHz PARALLEL LOAD PROFESSIONAL SYNTHESISER

Zarlink Semiconductor Inc 

SP8855D

40k 40k 5k

VCC

5k

INPUT

50mA

0V

Fig. 7a RF and reference divider programming bits,

Fpd/Fref enable, control direction and phase detector gain

control inputs

C–LOCK DETECT (HIGH WHEN LOCKED)

18

VCC

50k

3k 3k

VREF

4.7V

RF

INPUT

13

RF

INPUT

14

VCC

4k

325

325

500

500

3mA

3k

0V

Fig. 7b RF inputs

2k5

2k5

VCC

17

LOW

WHEN

LOCKED LOCK

DETECT

3k

3k

OUTPUT

20mA

100mA

0V

Fig. 7c Lock detect decouple

Rset

19

VCC

400mA

100

100

1k 11

0V

Fig. 7d Lock detect output

CHARGE PUMP

OUTPUT

REFERENCE

VCC

20 21

450

450

CHARGE PUMP

CURRENT SOURCES

130

UP

83

83

VCC

DOWN

2mA

Fig. 7e Rset pin.

Fig. 7f Charge pump circuit

Fig. 7 Interface circuit diagrams

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