SDA9401 Просмотр технического описания (PDF) - Unspecified

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SDA9401

Scan Rate Converter using Embedded DRAM Technology Units

Unspecified 

SDA 9401

Field detection and VIN delay

CLK1

H1

H2

VIN

Vd

Ffd

(VINDEL * 128 + 1) * Tclk1

x

Field 1(A)

VIN

Vd

Ffd

Input write parameter

(VINDEL * 128 + 1) * Tclk1

x

Field 2(B)

Parameter

[Default value]

VINDEL

[0]

FIEINV

1: Field A=1

0: Field A=0

[0]

VCRMODE

1: on

0: off

[1]

Subaddress

01h

00h

00h

Description

Delay of the incoming V-Sync VIN (must be adjusted

depending on the delay of the HIN signal)

Inversion of the internal field polarity

In case of non standard interlaced signals (VCR, Play-

Stations) a filtering of the internal field signal can be

done (can also be used for normal TV signals)

In case of non-standard signals the field order is indeterminate (e.g. AAA... , BBB... , AAABAAAB...,

etc.). Therefore a special filtering algorithm is implemented, which can be switched on by the

parameter VCRMODE.

The OPDEL parameter is used to adjust the outgoing V-Sync VOUT in relation to the incoming

delayed V-Sync VIN. In case of 50 Hz to 100 Hz interlaced scan rate conversion the OPDEL

parameter should be greater than half the number of lines of a field plus the internal processing

delay (8 lines).

Input write parameter

Parameter

[Default value]

OPDEL

[170]

Subaddress

06h

Description

Delay (in number of lines) of the internal V-Sync

(delayed VIN) to the outgoing V-Sync (VOUT)

The internal line counter is used to determine the information about the standard of the incoming

Micronas

11

Preliminary Data Sheet

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