PS200-I/SS Просмотр технического описания (PDF) - Microchip Technology

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PS200-I/SS

PowerSmart® Configurable Battery Charger

Microchip Technology 

PS200

TABLE 5-12: A/D CONVERSION REQUIREMENTS

Param

No.

Sym

Characteristic

Min

Typ†

130* TAD A/D Clock Period

1.6

3.0*

130* TAD A/D Internal RC

Oscillator Period

3.0*

2.0*

131* TCNV Conversion Time

—

(not including

acquisition time)(1)

132* TACQ Acquisition Time

—

—

—

6.0

4.0

11 TAD

11.5

Max Units

Conditions

—

μs TOSC based, VREF ≥ 2.5V

—

μs TOSC based, VREF full range

ADCS<1:0> = 11 (RC mode)

9.0*

μs At VDD = 2.5V

6.0*

μs At VDD = 5.0V

—

TAD Set GO bit to new data in

A/D Result register

—

μs

5*

—

—

μs The minimum time is the amplifier

settling time. This may be used if

the “new” input voltage has not

changed by more than 1 LSb (i.e.,

1 mV @ 4.096V) from the last

sampled voltage (as stated on

CHOLD).

134* TGO Q4 to A/D Clock

—

Start

TOSC/2

—

— If the A/D clock source is selected

as RC, a time of TCY is added

before the A/D clock starts. This

allows the SLEEP instruction to be

executed.

* These parameters are characterized but not tested.

† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance

only and are not tested.

Note 1: ADRES register may be read on the following TCY cycle.

FIGURE 5-7:

A/D CONVERSION TIMING (SLEEP MODE)

134

Q4

A/D CLK

A/D DATA

131

130

9

8

76

3

2

1

0

ADRES

OLD_DATA

NEW_DATA

ADIF

GO

SAMPLE 132

SAMPLING STOPPED

DONE

Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the

SLEEP instruction to be executed.

DS21891B-page 26

© 2005 Microchip Technology Inc.

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