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PS200-I/SS

PowerSmart® Configurable Battery Charger

Microchip Technology 

PS200

TABLE 5-11: A/D CONVERTER CHARACTERISTICS

Param

No.

Sym

Characteristic

Min

Typ†

Max Units

Conditions

A01 NR Resolution

—

A02

EABS Total Absolute Error*(1)

—

—

10 bits bit

—

±1

LSb VREF = 5.0V

A03 EIL Integral Error

—

—

±1

LSb VREF = 5.0V

A04 EDL Differential Error

—

—

±1 LSb No missing codes to 10 bits,

VREF = 5.0V

A05 EFS Full-Scale Range

2.2*

—

5.5*

V

A06

EOFF Offset Error

—

—

±1

LSb VREF = 5.0V

A07

A10

A20

A20A

EGN

—

VREF

Gain Error

Monotonicity

Reference Voltage

A25 VAIN Analog Input Voltage

—

—

2.2(4)

2.5

VSS

—

±1

guaranteed(2)

—

LSb VREF = 5.0V

— VSS ≤ VAIN ≤ VREF

—

—

V

VDD + 0.3

Absolute minimum to ensure

10-bit accuracy

—

VREF(5)

V

A30

ZAIN Recommended

—

—

10

kΩ

Impedance of Analog

Voltage Source

A50

IREF VREF Input Current*(3)

10

—

1000 μA During VAIN acquisition.

Based on differential of VHOLD

to VAIN.

—

—

10

μA During A/D conversion cycle.

*

†

Note 1:

2:

3:

4:

5:

These parameters are characterized but not tested.

Data in ‘Typ’ column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance

only and are not tested.

Total Absolute Error includes Integral, Differential, Offset and Gain Errors.

The A/D conversion result never decreases with an increase in the input voltage and has no missing codes.

VREF current is from external VREF or VDD pin, whichever is selected as reference input.

Only limited when VDD is at or below 2.5V. If VDD is above 2.5V, VREF is allowed to go as low as 1.0V.

Analog input voltages are allowed up to VDD, however, the conversion accuracy is limited to VSS to VREF.

FIGURE 5-6:

A/D CONVERSION TIMING (NORMAL MODE)

134

Q4

A/D CLK

131

130

1/2 TCY

A/D DATA

9

8

7

6

3

2

1

0

ADRES

OLD_DATA

NEW_DATA

ADIF

GO

SAMPLE

132

SAMPLING STOPPED

DONE

Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the

SLEEP instruction to be executed.

© 2005 Microchip Technology Inc.

DS21891B-page 25

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