Q-67106-H6514 Просмотр технического описания (PDF) - Siemens AG

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Q-67106-H6514

PLL-Frequency Synthesizer PMB2306R/PMB2306T Version 2.2

Siemens AG 

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8

10

FI

9&2)UHTXHQF\

Input with highly sensitive preamplifier for 14-bit n-counter and

7-bit a-counter. With small input signals AC coupling must be

set up, where DC coupling can be used for large input signals.

1

1

RI

5HIHUHQFH )UHTXHQF\

Input with highly sensitive preamplifier for 16-bit r-counter. With

small input signals AC coupling must be set up, where DC

coupling can be used for large input signals.

10

12

PD

3KDVH 'HWHFWRU

Tristate charge pump output. The integrated, positive and

negative current sources can be programmed with respect to

their current density by means of the serial control. Activation

and deactivation depend on the phase relationship of the

scaled-down input signals FI:N, RI:R. (See phase detector

output waveforms.)

frequency IV < IR or IV lagging:

active

p-channel current source

frequency IV > IR or IR leading:

active

n-channel current source

frequency IV = IR and PLL locked: current sources are

switched off, PD-output is tristate

In standby mode the PD-output is set to tristate. The

assignment of the current sources to the output signals of the

phase detector can be swapped in it’s polarity, i.e. the sign of

the phase detector constant can be controlled.

14

16

LD

/RFN 'HWHFWRU 2XWSXW (open drain). Unipolar output of the

phase detector in the form of a pulse-width modulated signal.

The L-pulse width corresponds to the phase difference. Phase

differences < 20 ns are not indicated due to gating of the

antibacklash impuls. In the locked state the LD-signal is at

H-level. In standby mode the output is resistive.

Only for ABL status 11 no gating of ABL impulse is performed.

Semiconductor Group

7

02.97

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