PEB2084 Просмотр технического описания (PDF) - Siemens AG

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PEB2084

ICs for Communications Quadruple Transceiver for S/T Interface QUAT-S

Siemens AG 

Quadruple Transceiver for S/T Interface

(QUAT-S)

PEB 2084

CMOS

1.1 Features

• Four full duplex (B1 + B2 + D) S/T interface

transceivers, each equipped with the following

functions:

– Analog S/T interfaces fully according to the

CCITT I.430, ETSI 300.012 and ANSI T1.605

standards.

– 192 kbit/s transmission rate

– Receive timing recovery

P-MQFP-44-2

– Conversion between pseudo-ternary

and binary codes

– Conversion between S/T and IOM-2 frame structures

– Activation / deactivation procedures, triggered by primitives received over the

IOM-2 interface or by info received from the line (e.g. detection of INFO1)

– Access to S and Q bits of S/T interface

– Execution of test loops

– Loop length up to 1.5 km (point-to-point)

– Frame alignment in trunk applications with maximum wander of ± 50 µs

– Logical S/T interface functions identical to PEB 2081, SBCX, for line card

applications.

– Analog S/T line transceivers identical to PEB 2081, SBCX.

• IOM-2 interface

• D-channel access control

• Support for JTAG boundary scan test

• 1µ CMOS technology with low power consumption

• + 5 V power supply

• P-MQFP-44 package

Type

PEB 2084 H

Ordering Code

Q6701-H6481

Package

P-MQFP-44-2 (SMD)

Semiconductor Group

8

07.95

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