PA10 Просмотр технического описания (PDF) - Cirrus Logic

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PA10

Power Operational Amplifier

Cirrus Logic 

PA10 • PA10A

Product Innova tionFrom

GENERAL

Please read Application Note 1 "General Operating Con-

siderations" which covers stability, supplies, heat sinking,

mounting, current limit, SOA interpretation, and specification

interpretation. Visit www.Cirrus.com for design tools that help

automate tasks such as calculations for stability, internal power

dissipation, current limit; heat sink selection; Apex Precision

Power’s completeApplication Notes library;Technical Seminar

Workbook; and Evaluation Kits.

SAFE OPERATING AREA (SOA)

The output stage of most power amplifiers has three distinct

limitations:

1. The current handling capability of the transistor geometry

and the wire bonds.

2. The second breakdown effect which occurs whenever the

simultaneous collector current and collector-emitter voltage

exceeds specified limits.

5.0

4.0

3.0

2.0

1.5

1.0

.8

T

C

=

85°C

steady

TTCHE=R1M25A°LC

state

t = 5ms

SECOND

t

=

t=

1ms

0.5ms

BREAKDOWN

.6

.4

.3

.2

10

15 20 25 30 35 40 50 60 70 80 100

SUPPLY TO OUTPUT DIFFERENTIAL VOLTAGE VS – VO (V)

3. The junction temperature of the output transistors.

The SOA curves combine the effect of these limits. For a

given application, the direction and magnitude of the output

current should be calculated or measured and checked against

the SOA curves. This is simple for resistive loads but more

complex for reactive and EMF generating loads.

1. For DC outputs, especially those resulting from fault condi-

tions, check worst case stress levels against the new SOA

graph.

For sine wave outputs, use Power Design1 to plot a load

line. Make sure the load line does not cross the 0.5ms limit

and that excursions beyond any other second breakdown

line do not exceed the time label, and have a duty cycle of

no more than 10%.

1 Note 1. Power Design is a self-extracting Excel spread-

sheet available free from www.Cirrus.com

For other waveform outputs, manual load line plotting

is recommended. Applications Note 22, SOA AND LOAD

LINES, will be helpful. A Spice type analysis can be very

useful in that a hardware setup often calls for instruments

or amplifiers with wide common mode rejection ranges.

2. The amplifier can handle any EMF generating or reactive

load and short circuits to the supply rail or shorts to com-

mon if the current limits are set as follows at TC = 85°C:

4

SHORT TO ±VS

SHORT TO

±VS

C, L, OR EMF LOAD COMMON

50V

.21A

.61A

40V

.3A

.87A

35V

.36A

1.0A

30V

.46A

1.4A

25V

.61A

1.7A

20V

.87A

2.2A

15V

1.4A

2.9A

CURRENT LIMITING

Refer to Application Note 9, "Current Limiting", for details of

both fixed and foldover current limit operation. Visit the Apex

Precision Power web site at www.Cirrus.com for a copy of the

Power Design spreadsheet (Excel) which plots current limits vs.

steady state SOA. Beware that current limit should be thought

of as a +/–20% function initially and varies about 2:1 over the

range of –55°C to 125°C.

For fixed current limit, leave pin 7 open and use equations

1 and 2.

RCL = 0.65/LCL

(1)

ICL = 0.65/RCL

(2)

Where:

ICL is the current limit in amperes.

RCL is the current limit resistor in ohms.

For certain applications, foldover current limit adds a slope

to the current limit which allows more power to be delivered

to the load without violating the SOA. For maximum foldover

slope, ground pin 7 and use equations 3 and 4.

0.65 + (Vo * 0.014)

ICL =

RCL

(3)

0.65 + (Vo * 0.014)

RCL =

ICL

(4)

Where:

Vo is the output voltage in volts.

Most designers start with either equation 1 to set RCL for the

desired current at 0v out, or with equation 4 to set RCL at the

maximum output voltage. Equation 3 should then be used to

plot the resulting foldover limits on the SOA graph. If equa-

tion 3 results in a negative current limit, foldover slope must

be reduced. This can happen when the output voltage is the

opposite polarity of the supply conducting the current.

In applications where a reduced foldover slope is desired,

this can be achieved by adding a resistor (RFO) between pin

7 and ground. Use equations 4 and 5 with this new resistor

in the circuit.

0.65 + Vo * 0.14

ICL =

10.14 + RFO

      RCL

(5)

0.65 + Vo * 0.14

RCL =

10.14 + RFO

      ICL

(6)

Where:

RFO is in K ohms.

PA10U

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