NIS6201 Просмотр технического описания (PDF) - ON Semiconductor

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NIS6201

Floating, Regulated Charge Pump

ON Semiconductor 

NIS6201

OPERATING DESCRIPTION

DC Input

The Vcc pin is rated for a maximum dc voltage of 15

volts. An internal shunt diode is included for applications

where the voltage may exceed 15 volts. For voltages

greater than 15 volts an external shunt resistor must be

added in series with the Vcc pin. This resistor must be sized

such that at low line, the voltage drop across it will allow

for an input voltage of greater than that of the output of the

LDO and at high line such that the current into the chip does

not exceed its power rating.

LDO

The internal LDO contains a P−Channel FET and error

amplifier with a 0.5 volt reference. A voltage divider is

required from the Vreg pin to the comp pin to set the output

of the LDO. This output voltage (Vreg) is the voltage used

for the charge pump oscillator. The divider can be

calculated from the following formulas:

Rbias

+

0.50

V

Ibias

Ibias is generally in the range of 100 mA to 1 mA and sets

the bias current in the divider.

Rset

+

Rbias(Vreg *

0.50 V

0.50

V)

NIS6201

8 34

6

Vset

Vbias

0.1uF

Figure 6. Bias Voltage Divider

Overcharge Comparator

The overcharge comparator provides a protection

function from an overvoltage condition at turn−on.

Figure 7 shows a typical configuration for this charge

pump. At turn−on there is a voltage divider consisting of

two capacitors and two diodes. If this device is being

operated at voltages significantly above the Vreg level, it

is possible to charge the Vreg cap well beyond its intended

level.

VCC

1.25 V

+ Regulator

−

+ Overcharge

−

0.10 V

1 MHz

Oscillator

DRIVE

COMP

VREG

GND

Figure 7. Overcharge Circuit

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