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MAX9947ETE

AISG Integrated Transceiver

Maxim Integrated 

MAX9947

AISG Integrated Transceiver

Detailed Description

The MAX9947 is an AISG-compliant, fully integrated

transceiver.

The MAX9947 transmitter includes an OOK modulator, a

bandpass filter that is compliant with the AISG spectrum

emission profile, and an output amplifier. The output

power can be varied with external resistors from +7dBm

to +12dBm (+1dBm to +6dBm at the feeder cable) to com-

pensate for loss in the external circuitry and cabling. The

OOK carrier is generated by applying an external crystal

at 8.704MHz to the OOK internal modulator through the

XTAL1 and XTAL2 pins. An external clock source at the

same frequency can also be applied to XTAL1 by con-

necting XTAL2 to ground.

The MAX9947 receiver includes a narrow 200kHz band-

width bandpass filter that operates around the 2.176MHz

center frequency. It also includes an OOK demodulator

and a comparator that reconstruct the digital signal. The

minimum sensitivity of the receiver is -15dBm (typ) in

compliance with the AISG standard specifications.

The MAX9947 also features a direction output to facilitate

the RS-485 bus arbitration in tower-mounted equipment.

Direction Output

The MAX9947 provides a direction output pin (DIR) that

indicates the direction of the data flow. This feature is

very useful in the tower that acts as a slave in the AISG

protocol. The base is the master and it controls the flow of

the data by performing the bus arbitration. The output DIR

allows the equipment in the tower to avoid any involvement

in the bus arbitration. See the Typical Application Circuit

(Connectivity at the Tower) that shows how the MAX9947

can be used in the tower in conjunction with the RS-485

transceiver such as the MAX13485E or MAX13486E.

The output DIR drives the DE (driver output enable) and

RE_ (receiver output enable) of the RS-485 transceiver.

Whenever the data flows from RXIN to RXOUT, the out-

put DIR is asserted high. When the MAX9947 is located

in the tower, the data flow is being sent from the base

(master) to the tower (slave). On the other side, when the

data flows in the opposite direction, from TXIN to TXOUT

the output DIR is asserted low. However, the MAX9947

internal state machine is sensing both the TXIN and RXIN

lines, and can recognize the correct flow of data and avoid

asserting the DIR high.

Figure 1 and Figure 2 show the timing diagrams of the DIR

functionality. When the data flows from RXIN to RXOUT,

DIR remains high for 16 bit-times after the last logic-level

low bit within the 8-bit protocol data. This is compliant with

the AISG specification saying that the RS-485 transmitter

stops driving the bus within 20 bit-times after the last stop

bit is sent.

The input pins DIRMD2 and DIRMD1 define the duration

of the bit time, as shown in Table 1.

TXIN IDLE (LOGIC-LEVEL HIGH)

RXIN IDLE

STOP BIT

IDLE

IDLE

RXOUT

START BIT BIT0 = 1 BIT1 = 1 BIT2 = 0 BIT3 = 0 BIT4 = 1 BIT5 = 1 BIT6 = 0 BIT7 = 0 STOP BIT

tRX

DIR = 1

DIR

tDIR, SKEW

Figure 1. The MAX9947 on the Tower: Communication Flow is from the Base to the Tower

DIR = 1 FOR OTHER 16 BIT-TIMES

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