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M64897GP(2006) Просмотр технического описания (PDF) - Renesas Electronics

Номер в каталоге
Компоненты Описание
производитель
M64897GP
(Rev.:2006)
Renesas
Renesas Electronics Renesas
M64897GP Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
M64897GP
Method of Setting Data
The input information to consist of 2 or data of 4 bytes to lead to chip address is received in I2C bus receiver. It shows a
definition of bus protocol admitted in the following.
1_STA
CA CB BB STO
2_STA
CA D1 D2 STO
3_STA
CA CB BB D1 D2 STO
4_STA
CA D1 D2 CB BB STO
STA : Start condition
STO : Stop condition
CA : Chip address
CB : Control data byte
BB : Band SW data byte
D1 : Divider data byte
D2 : Divider data byte
The information of 5 bytes necessary for circuit operation is chip address and control data, band SW data of 2 bytes and
divider byte of 2 bytes. After the chip address input, 2 or data of 4 bytes are received.
Function bit is contained the first and the third data byte to distinguish between divider data and control data, band data,
and “0” goes ahead of divider data, and “1” goes ahead of control data, band SW data.
SDA
SCL
1-7
8
9
S
Address 0
ACK
STA
CA
1-7
8
Data
9
ACK
1-7
8
Data
9
ACK
P
STO
Write Mode Format
Byte
Address byte
Divider byte 1
Divider byte 2
Control byte 1
Band SW byte
Read Mode Format
Byte
Address byte
Status byte 1
MSB
LSB
1
1
0
0
0
MA1 MA0
0
A
0
N14
N13
N12
N11
N10
N9
N8
A
N7
N6
N5
N4
N3
N2
N1
N0
A
1
X
T2
T1
T0
RSa RSb
OS
A
X
X
X
X
BS4 BS3 BS2 BS1
A
MSB
LSB
1
1
0
0
0
MA1 MA0
1
A
POR
FL
X
X
X
A2
A1
A0
A
Rev.2.00 Jun 14, 2006 page 8 of 13

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