M64893AGP Просмотр технического описания (PDF) - MITSUBISHI ELECTRIC
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M64893AGP Datasheet PDF : 12 Pages
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MITSUBISHI BIPOLAR DIGITAL ICs
M64893AFP/AGP
SERIAL INPUT PLL FREQUENCY SYNTHESIZER FOR TV/VCR
Pin description
Symbol
f in
GND
Vcc1
Vcc2
BS4
BS3
BS2
BS1
Vin
Pin No.
1
2
3
4
5
6
7
8
9
Pin name
Prescaler input
GND
Power supply voltage 1
Power supply voltage 2
Band switching
outputs
Filter input
(Charge pump output)
Vtu
Vcc3
LD/ f test
10 Tuning output
11 Power supply voltage 3
12 Lock detect/ Test port
CLOCK
DATA
ENABLE
13 Clock input
14 Data input
15 Enable input
X in
16 This is connected to the
crystal oscillator.
Function
Input for the VCO frequency.
Ground to 0V.
Power supply voltage terminal. 5.0 ±0.5V
Power supply for band switching,Vcc1 to 13.2V
PNP open collector method is used.
When the band switching data is "H",the output is ON.
When it is "L",the output is OFF.
This is the output terminal for the LPF input and charge
pump output. When the phase of the programmable divider
output ( f 1/N) is ahead compared to the reference
frequency (fref), the "source" current state becomes active.
If it is behind, the "sink" current becomes active.
If the phases are the same, the high impedance state
becomes active.
This supplies the tuning voltage.
Power supply voltage for tuning voltage 28 to 35V
When 19 bit data is input,lock detector is output.
When 27 bit data is input, lock detector is output,
the programmable freq. Divider output and reference freq.
Output is selected by the test mode.
Data is read into the shift register when the clock signal falls.
Input for band SW and programmable freq. divider set up.
This is normally at a "L". When this is at "H", data and clock
signals are received. Data is read into the latch when the 19th
pulse of the clock signal falls.
4.0MHz crystal oscillator is connected.
MITSUBISHI
2 -12
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