M64892GP Просмотр технического описания (PDF) - MITSUBISHI ELECTRIC
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M64892GP Datasheet PDF : 8 Pages
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MITSUBISHI ICS (TV)
M64892AFP/GP
SERIAL INPUT PLL FREQUENCY SYNTHESIZER FOR TV/VCR
METHOD OF SET THE DIVIDING RATIO OF THE
PROGRAMMABLE DIVIDER
(1) Transfer of the 18th bit data
Total division N is given by the following formulas in addition to the
prescaler used in the previous stage.
N=8 (32M+S) M:9 bit main counter division
S:5 bit swallow counter division
The M and S counters are binary the possible ranges of division are
as follows.
32≤M≤511
0≤S≤31
Therefore, the range of division N is 8,192 to 131,064.
The tuning frequency fVCO is given in the following equations.
fVCO =fREF×N
=7.8125×8×(32M+S)
=62.5×(32M+S) [kHz]
Therefore, the tuning frequency range is 64MHz to 1023.9375MHz.
(2) Transfer of the 19th bit data
Total division N is given by the following formulas in addition to the
prescaler used in the previous stage.
N=8 (32M+S) M:10 bit main counter division
S:5 bit swallow counter division
The M and S counters are binary the possible ranges of division are
as follows.
32≤M≤1023
0≤S≤31
Therefore, the range of division N is 8,192 to 262,136.
The tuning frequency fVCO is given in the following equations.
fVCO =fREF×N
= 3.90625×8×(32M+S)
= 31.25×(32M+S) [kHz]
Therefore, the tuning frequency range is 32MHz to 1023,9687MHz.
TEST MODE DATA SET UP METHOD
The data for the test mode uses 20 to 27bits. Data is latched when
the 27th clock signal falls.
(1) When transferring 3-wire 27bit data
ENA
CLK
1
BAND SW
DATA
M COUNTER DIVISION
RATIO SETTING
19 20
27
S COUNTER
DIVISION
RATIO SETTING
S1 CP T2 T1 T0 RSa RSb OS
TEST DATA SETTING
READ INTO LATCH
6
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