DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

M64285FP Просмотр технического описания (PDF) - MITSUBISHI ELECTRIC

Номер в каталоге
Компоненты Описание
производитель
M64285FP Datasheet PDF : 26 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Technical Data Sheet
MITSUBISHI
PRELIMINARY
MITSUBISHI CMOS Image Sensor
M64285FP
10. Electrical Characteristics (AC)
( Ta = 25 °C )
Symbols
Items
Min.
Typ.
Max.
Units
t c (CLK)
CLK cycle time *
0.5
0.5
2
µs
t WH (CLK)
CLK pulse width ( "H" level )
240
-
-
ns
t WL (CLK)
CLK pulse width ( "L" level )
240
-
-
ns
t r (CLK)
CLK rise time
-
-
10
ns
t f (CLK)
CLK fall time
-
-
10
ns
t c (SCLK)
SCLK cycle time
0.5
-
-
µs
t WH (SCLK)
SCLK pulse width ( "H" level )
240
-
-
ns
t WL (SCLK)
SCLK pulse width ( "L" level )
240
-
-
ns
t r (SCLK)
SCLK rise time
-
-
10
ns
t f (SCLK)
SCLK fall time
-
-
10
ns
t WL (RESET)
RESET pulse width ( "L" level )
200
-
-
ns
t D (RESET-SIN)
RESET-SIN delay time
100
-
-
ns
t S (SIN)
SIN setup time
50
-
-
ns
t H (SIN)
SIN hold time
50
-
-
ns
t D (SIN-LOAD)
SIN-LOAD delay time
( Note 1 )
-
-
ns
t D (LOAD-SIN)
LOAD-SIN delay time
( Note 2 )
-
-
ns
t S (LOAD)
LOAD setup time
50
-
-
ns
t H (LOAD)
LOAD hold time
50
-
-
ns
t S (START)
START setup time
50
-
-
ns
t H (START)
START hold time
50
-
-
ns
t DR (CLK_STRB) CLK-STRB delay time (Rise) **
-
-
100
ns
t DF (CLK_STRB) CLK-STRB delay time (Fall) **
-
-
100
ns
t r (VOUT)
VOUT stabilization time **
-
600
-
ns
t H (VOUT)
VOUT hold time
-
-
( Note 3 )
µs
* Hereafter CLK cycle time is written to be φ.
** Load Capacitance = 50 pF
t t t Note 1: D (SIN-LOAD) 100 + - S (SIN) S (LOAD)
t t t Note 2: D (LOAD-SIN) 100 + - S (LOAD) S (SIN)
Note 3: t H (VOUT) ( DOC - φ / 2 ) x t C (CLK) - 0.1 [µs]
DOC: see the explanation of DR register.
( 4 / 26 )
Specifications and information herein are subject to change without notice.
02 / 05 / 01
Ver. 2.2E_01

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]