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M5M5V208AKV Просмотр технического описания (PDF) - Renesas Electronics

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производитель
M5M5V208AKV
Renesas
Renesas Electronics Renesas
M5M5V208AKV Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
RENESAS LSIs
M5M5V208AKV
2097152-BIT(262144-WORD BY 8-BIT)CMOS STATIC RAM
DESCRIPTION
The M5M5V208AKV is low voltage 2-Mbit static RAMs organized
as 262,144-words by 8-bit, fabricated by high-performance 0.25µm
CMOS technology.
The M5M5V208AKV is suitable for memory applications where a
simple interfacing , battery operating and battery backup are the
important design objectives.
The M5M5V208AKV is packaged in 32-pin 8mm x 13.4mm
sTSOP packages which is a high reliability and high density surface
mount device.
FEATURES
Type name
M5M5V208AKV-55HI
M5M5V208AKV-70HI
Access
time
(max)
55ns
70ns
Power supply current
Active
(max)
stand-by
(max)
35mA
(10MHz)
7mA
(1MHz)
30µA
(Vcc= 3.6V)
0.3µA
(Vcc= 3.0V
TYPICAL)
PIN CONFIGURATION (TOP VIEW)
A11 1
A9 2
A8 3
A13 4
W5
S2 6
A15 7
VCC 8
A17 9
A16 10
A14 11
A12 12
A7 13
A6 14
A5 15
A4 16
M5M5V208AKV
Outline 32P3K-B(KV)
32 OE
31 A10
30 S1
29 DQ8
28 DQ7
27 DQ6
26 DQ5
25 DQ4
24 GND
23 DQ3
22 DQ2
21 DQ1
20 A0
19 A1
18 A2
17 A3
Single 2.7 ~3.6V power supply
No clock, No refresh
Directly TTL compatible : All inputs and outputs
Easy memory expansion and power down by S1,S2
Data hold on +2V power supply
Three-state outputs : OR - tie capability
OE prevents data contention in the I/O bus
Common data I/O
Package
2
M5M5V208AKV ············· 32pin 8 X 13.4 mm sTSOP
Rev ision-A0.5
1

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