M2S28D20ATP Просмотр технического описания (PDF) - Mitsumi
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M2S28D20ATP Datasheet PDF : 36 Pages
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DDR SDRAM (Rev.0.1)
Jun,'00 Preliminary
MITSUBISHI LSIs
M2S28D20/ 30/ 40ATP
128M Double Data Rate Synchronous DRAM
COMMAND TRUTH TABLE
COMMAND
Deselect
No Operation
Row Address Entry &
Bank Activate
Single Bank Precharge
Precharge All Banks
Column Address Entry
& Write
Column Address Entry
& Write with
Auto-Precharge
Column Address Entry
& Read
Column Address Entry
& Read with
Auto-Precharge
Auto-Refresh
Self-Refresh Entry
Self-Refresh Exit
Burst Terminate
Mode Register Set
MNEMONIC CKE CKE /CS /RAS /CAS /WE BA0,1 A10 A0-9, note
n-1 n
/AP 11
DESEL
H
X
H
X
X
X
X
X
X
NOP
H
X
L
H
H
H
X
X
X
ACT
H
H
L
L
H
H
V
V
V
PRE
PREA
H
H
L
L
H
L
V
L
X
H
H
L
L
H
L
X
H
X
WRITE
H
H
L
H
L
L
V
L
V
WRITEA
H
H
L
H
L
L
V
H
V
READ
H
H
L
H
L
H
V
L
V
READA
REFA
REFS
REFSX
TERM
MRS
H
H
L
H
L
H
V
H
V
H
H
L
L
L
H
X
X
X
H
L
L
L
L
H
X
X
X
L
H
H
X
X
X
X
X
X
L
H
L
H
H
H
X
X
X
H
H
L
H
H
L
X
X
X1
H
H
L
L
L
L
L
L
V2
H=High Level, L=Low Level, V=Valid, X=Don't Care, n=CLK cycle number
NOTE:
1. Applies only to read bursts with autoprecharge disabled; this command is undefined (and should not be used) for
read bursts with autoprecharge enabled, and for write bursts.
2. BA0-BA1 select either the Base or the Extended Mode Register (BA0 = 0, BA1 = 0 selects Mode Register; BA0=1 ,
BA1 = 0 selects Extended Mode Register; other combinations of BA0-BA1 are reserved; A0-A11 provide the
op-code to be written to the selected Mode Register.
MITSUBISHI ELECTRIC
6
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