Q67100-Q2179 Просмотр технического описания (PDF) - Siemens AG
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Q67100-Q2179 Datasheet PDF : 14 Pages
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HYM 64(72)V1005GU-50/-60
1M x 64/72 DRAM Module
AC Characteristics (contd’ ) 5)6)
TA = 0 to 70 °C,VCC = 3.3 V ± 0.3 V, tT = 2 ns
Parameter
Symbol
Limit Values
-50
-60
min. max. min. max.
Data to CAS low delay
Data to OE low delay
CAS high to data delay
OE high to data delay
tDZC
0
–
0
–
tDZO
0
–
0
–
tCDD
10
–
13
–
tODD
10
–
13
–
Unit
ns
ns
ns
ns
16E
Note
13
13
14
14
Write Cycle
Write command hold time
tWCH
8
–
10
–
ns
Write command pulse width
tWP
8
–
10
–
ns
Write command setup time
tWCS
0
–
0
–
ns 15
Write command to RAS lead time
tRWL
13
–
15
–
ns
Write command to CAS lead time
tCWL
13
–
15
–
ns
Data setup time
tDS
0
–
0
–
ns 16
Data hold time
tDH
8
–
10
–
ns 16
Read-modify-Write Cycle
Read-write cycle time
tRWC
113
–
138
–
ns
RAS to WE delay time
tRWD
64
–
77
–
ns 15
CAS to WE delay time
tCWD
27
–
32
–
ns 15
Column address to WE delay time
tAWD
39
–
47
–
ns 15
OE command hold time
tOEH
10
–
13
–
ns
Hyper Page Mode (EDO) Cycle
Hyper page mode (EDO) cycle time
CAS precharge time
Access time from CAS precharge
Output data hold time
RAS pulse width in EDO mode
CAS precharge to RAS Delay
OE setup time prior to CAS
tHPC
tCP
tCPA
tCOH
tRAS
tRHPC
tOES
20
–
25
–
ns
8
–
10
–
ns
–
27
–
32
ns 7
5
–
5
–
ns
50 200k 60 200k ns
27
–
32
–
ns
5
–
5
–
ns
Semiconductor Group
10
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