EN5394QI Просмотр технического описания (PDF) - Enpirion, Inc.

Номер в каталоге

Компоненты Описание

производитель

EN5394QI

Feature Rich 9A Voltage Mode Synchronous Buck PWM DC-DC Converter with Integrated Inductor

Enpirion, Inc. 

EN5394QI

Electrical Characteristics

NOTE: VIN=5.5V over operating temperature range unless otherwise noted.

Typical values are at TA = 25°C.

PARAMETER

Input Voltage

Under Voltage Lock out

threshold

Shut-Down Supply

Current

Feedback Pin Voltage

Feedback Pin Input Leakage

Current1

Line Regulation

Load Regulation

Temperature Regulation

VOUT Rise Time

Rise Time Accuracy1

Output Dropout

Voltage1

Resistance1

Maximum Continuous

Output Current2

Current Limit Threshold

ENABLE pin:

Disable Threshold

Enable Threshold

ENABLE Lock-out time

ENABLE Pin Input

Current

Switching Frequency

External S_IN Clock

Frequency Lock Range

S_IN Threshold – Low

S_IN Threshold – High

S_OUT Threshold – Low

S_OUT Threshold – High

S_IN Duty Cycle for

External Synchronization1

S_IN Duty Cycle for

Parallel Operation1

Phase Delay vs. S_Delay

Resistor value

Phase Delay between

S_IN and S_OUT1

SYMBOL

VIN

VUVLOR

VUVLOF

IS

VFB

IFB

ΔVOUT_LINE

ΔVOUT_LOAD

ΔVOUT_TEMP

TRISE

ΔTRISE

VDO

RDO

IOUT_MAX_CONT

IOCP

VDISABLE

VENABLE

tENLO

IENABLE

FSWITCH

FPLL_LOCK

VS_IN_LO

VS_IN_HI

VS_OUT_LO

VS_OUT_HI

SYDC_SYNC

SYDC_PWM

ΦDEL

ΦDEL

COMMENTS

VIN Increasing

VIN Decreasing

ENABLE=0V

2.375V ≤ VIN ≤ 6.6V,

ILOAD = 1A; TA = 25°C

2.375V ≤ VIN ≤ 6.6V

0A ≤ ILOAD ≤ 6A

-40°C ≤ TEMP ≤ 85°C

Measured from when VIN ≥ VUVLOR

& ENABLE pin crosses logic high

threshold. (4.7nF ≤ CSS ≤ 100nF)

4.7nF ≤ CSS ≤ 100nF

VINMIN – VOUT at Full Load

Input to Output Resistance

OCP_ADJ pulled low

2.375V ≤ VIN ≤ 6.6V

ENABLE pin logic low

ENABLE pin logic high

Time for device to re-enable after

a falling edge on ENABLE pin

VIN = 5.5V

Free Running frequency

Frequency Range of S_IN

Input Clock

S_IN Clock low level

S_IN Clock high level

S_OUT Clock low level

S_OUT Clock high level

M/S Pin Float or Low

M/S Pin High

Delay in ns / kΩ

Delay in phase angle / kΩ -

@ 4MHz switching frequency

Phase delay programmable via

resistor connected from S_Delay

to AGND.

MIN

2.375

0.588

-5

-25

9

1.10

3.6

1.8

1.8

20

10

20

©Enpirion 2009 all rights reserved, E&OE

03738

5

8/21/2009

TYP

2.2

2.1

250

0.600

0.035

−0.04

0.001

CSS x

65kΩ

360

40

14

2

50

4

2

3

MAX

6.6

UNITS

V

V

μA

0.612

V

5

nA

%/V

%/A

%/°C

+25

%

720

mV

80

mΩ

A

A

1.0

V

1.30

ms

μA

MHz

4.4 MHz

0.8

V

2.5

V

0.5

V

V

80

%

90

%

ns

°

150

ns

www.enpirion.com

Rev:B

Share Link: