EN5335QI-E Просмотр технического описания (PDF) - Enpirion, Inc.
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EN5335QI-E Datasheet PDF : 13 Pages
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EN5335QI
Z = ESR + ESL.
Placing output capacitors in parallel reduces the
impedance and will hence result in lower ripple
voltage.
1 = 1 + 1 + ... + 1
ZTotal Z1 Z 2
Zn
Typical ripple versus capacitance is given below:
Output Capacitor
Configuration
1 x 47 uF
3 x 22 uF
Typical Output Ripple (mVp-p)
(as measured on EN5335QI
Evaluation Board)
30
15
During start-up of the converter, the reference
voltage to the error amplifier is gradually
increased from zero to its final level by an
internal current source of typically 10uA. Typical
soft-start rise time is 1mS to 3mS. The rise time
is measured from the time when AVIN > VUVLO
and the Enable signal crosses its logic high
threshold. Typical SS capacitor values are in the
range of 15nF to 50 nF.
Power-up Sequencing
The sequencing of AVIN, PVIN and ENABLE
should meet the following requirements:
1. ENABLE should not be asserted before PVIN.
2. PVIN should not be applied before AVIN.
Table 3. Recommended output capacitors.
Description
22uF, 6.3V, 10%
X5R, 1206
(3 capacitors needed)
47uF, 10V, 10%
X5R, 1210
47uF, 6.3V, 10%
X5R, 1210
(1 capacitor needed)
MFG
Murata
Taiyo Yuden
Murata
AVX
P/N
GRM31CR60J226KE19L
JMK316BJ226KL-T
GRM32ER61A476KE20L
12106D476KAT2A
Enable Operation
The ENABLE pin provides a means to shut down
the device, or enable normal operation. A logic
high will enable the converter into normal
operation. When the ENABLE pin is asserted,
the device will undergo a normal soft start. A
logic low will disable the converter and cause it to
shut down. When Enable goes low, circuitry
internal to the device continue to operate to
ensure the output voltage is gradually returned to
zero and the circuits turn off subsequently. A
short low going pulse on Enable is ignored.
Soft-Start Operation
Soft start is a method to reduce in-rush current
when the device is enabled. The output voltage
is ramped up slowly upon start-up. The output
rise time is controlled by choice of a soft-start
capacitor, which is placed between the SS pin
(pin 37) and the AGND pin (pin 29).
Note that tying AVIN, PVIN and ENABLE
together and brought up at the same time does
meet these requirements.
POK Operation
The POK signal is an open drain signal from the
converter indicating the output voltage is within
the specified range. The POK signal will be a
logic high when the output voltage is within 90% -
120% of the programmed output voltage. If the
output voltage goes outside of this range, the
POK signal will be a logic low until the output
voltage has returned to within this range. In the
event of an over-voltage condition the POK
signal will go low and will remain in this condition
until the output voltage has dropped to 95% of
the programmed output voltage before returning
to the high state (see also: Over Voltage
Protection).
Over-Current Protection
The current limit function is achieved by sensing
the current flowing through the sense P-
MOSFET. When the sensed current exceeds the
current limit, both NFET and PFET switches are
turned off. If the over-current condition is
removed, the over-current protection circuit will
enable the PWM operation. This circuit is
designed to provide high noise immunity.
Rise Time: TR = Css* 75KΩ
The nominal over current trip point is set to 4.5A.
It is possible to increase the over-current set
©Enpirion 2009 all rights reserved, E&OE
00846
9
9/18/2009
www.enpirion.com
Rev:C
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