DS28E04-100 Просмотр технического описания (PDF) - Dallas Semiconductor -> Maxim Integrated
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DS28E04-100 Datasheet PDF : 36 Pages
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DS28E04-100: 4096-Bit 1-Wire Addressable EEPROM with PIO
Note 21:
Note 22:
Current drawn during the EEPROM programming interval. If the device does not get VCC power, the pullup circuit on IO during the
programming interval should be such that the voltage at IO is greater than or equal to VPUP(min). If VPUP in the system is close to
Vpup(min) then a low-impedance bypass of RPUP that can be activated during programming may need to be added.
The tPROG interval begins tREHmax after the trailing rising edge on IO for the last time slot of the E/S byte for a valid Copy Scratchpad
sequence. Interval ends once the device's self-timed EEPROM programming cycle is complete and the current drawn by the
device has returned from IPROG to IL or ICCS, respectively.
PARAMETER
tSLOT (incl. tREC)
tRSTL
tPDH
tPDL
tW0L
LEGACY VALUES
STANDARD SPEED OVERDRIVE SPEED
MIN
MAX
MIN
MAX
61µs
(undef)
7µs
(undef)
480µs
(undef)
48µs
80µs
15µs
60µs
2µs
6µs
60µs
240µs
8µs
24µs
60µs
120µs
6µs
16µs
DS28E04-100 VALUES
STANDARD SPEED OVERDRIVE SPEED
MIN
MAX
MIN
MAX
65µs1)
(undef)
9µs
(undef)
504µs
640µs
53µs
80µs
15µs
60µs
2µs
7µs
60µs
240µs
8µs
26µs
60µs
120µs
7µs
16µs
1) Intentional change, longer recovery time requirement due to modified 1-Wire front end.
PIN DESCRIPTION
PIN
NAME
1
A3
2
A2
3
A1
4
A0
5, 12
GND
6, 11
N.C.
7
VCC
8
POL
9
P0
10
P1
13
A6
14
A5
15
A4
16
IO
FUNCTION
Address bit input (place value = 8), with weak pullup.
Address bit input (place value = 4), with weak pullup.
Address bit input (place value = 2), with weak pullup.
Least significant address bit input (place value = 1), with weak pullup.
Ground Reference
Not Connected
Optional power supply for the chip; float or ground if VCC power is not available.
Power-up polarity (logical state) for P0 and P1; pin has a weak pulldown.
Remote-controlled I/O pin, open drain with weak pulldown.
Remote-controlled I/O pin, open drain with weak pulldown.
Address bit input (place value = 64), with weak pullup.
Address bit input (place value = 32), with weak pullup.
Address bit input (place value = 16), with weak pullup.
1-Wire Bus Interface. Open drain, requires external pullup resistor.
DETAILED DESCRIPTION
The DS28E04-100 combines 4096 bits of EEPROM, a 16-byte control page, two general-purpose PIO pins, seven
external address pins, and a fully featured 1-Wire interface in a single chip. PIO outputs are configured as open-
drain and provide an on-resistance of 100W max. A robust PIO channel-access communication protocol ensures
that PIO output-setting changes occur error-free. The DS28E04-100 has an additional memory area called the
scratchpad that acts as a buffer when writing to the main memory or the control page. Data is first written to the
scratchpad from which it can be read back. The copy scratchpad command transfers the data to its final memory
location. Each DS28E04-100 has a device ID number that is 64 bits long. The user can define seven bits of this
number through address pins. The remaining 57 bits are factory-lasered into the chip. The device ID number
guarantees unique identification and is used to address the device in a multidrop 1-Wire network environment,
where multiple devices reside on a common 1-Wire bus and operate independently of each other. The DS28E04-
100 also supports 1-Wire conditional search capability based on PIO conditions or power-on-reset activity. The
DS28E04-100 has an optional VCC supply connection. When an external supply is absent, device power is supplied
parasitically from the 1-Wire bus. When an external supply is present, PIO states are maintained in the absence of
the 1-Wire bus power source. Applications of the DS28E04-100 include autoconfiguration and state monitoring of
modular systems such as central-office switches, cellular base stations, access products, optical network units, and
PBXs, and accessory/PC board identification.
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