DRF100
Figure 8, Leading Edge throughput
Delay ~= 37ns
Figure 9, Trailing Edge throughput
Delay ~= 37ns
Figure 10, Output Rise Time = 7.2ns
Figure 11, Output Fall Time = 7.2ns
All waveforms on this page, Figures
8 thru 12, were taken using the test
circuit of Figure 3, with the following
test conditions:
4. +VDD = 15V
5. Control input 5.0V/50Ω
6. Load = 50Ω+3nF
Figure 12, DRF-100 Output @ 30MHz in
to 50Ω +3nF