CXB1581Q Просмотр технического описания (PDF) - Sony Semiconductor
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CXB1581Q Datasheet PDF : 22 Pages
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CXB1581Q
2. ECL input circuit
The ECL differential input pins (excluding EXCLK) of the CXB1581Q are biased to VBB (VCC – 1.3V) via an
18kΩ resistor in the IC. See the figures below for ECL differential input methods.
VCC = 3.3V, VEE = GND
VCC = 3.3V, VEE = GND
VBB (VCC – 1.3V)
18kΩ
3.3V ECL output buffer
160Ω
160Ω
18kΩ
ECL differential input buffer
(a) ECL differential signal from 3.3V ECL output buffer
VCC = GND, VEE = –4.5V
0.01µF
VCC = 3.3V, VEE = GND
18kΩ
VBB (VCC – 1.3V)
ECL100K output buffer
330Ω
0.01µF
330Ω
VEE
18kΩ
ECL differential input buffer
(b) ECL differential signal from ECL100K output buffer
50Ω
TRANS.
LINE
0.01µF
VCC = 3.3V, VEE = GND
VBB (VCC – 1.3V)
18kΩ
0.01µF
18kΩ
50Ω
50Ω
VTT (VCC – 2V)
ECL differential input buffer
(c) ECL differential signal from 50Ω transmission line
50Ω
TRANS.
LINE
0.01µF
VCC = 3.3V, VEE = GND
VBB (VCC – 1.3V)
18kΩ
50Ω
VTT (VCC – 2V)
0.01µF
18kΩ
ECL differential input buffer
(d) ECL single signal from 50Ω transmission line
Fig. 2. ECL Input Circuits
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