DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

CDS-1401MM Просмотр технического описания (PDF) - Murata Power Solutions

Номер в каталоге
Компоненты Описание
производитель
CDS-1401MM Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
CDS-1401
®
®
ABSOLUTE MAXIMUM RATINGS
PHYSICAL/ENVIRONMENTAL
PARAMETERS
LIMITS
UNITS
PARAMETERS
MIN. TYP. MAX. UNITS
+15V Supply (Pin 24)
0 to +16
Volts
–15V Supply (Pin 13)
0 to –16
Volts
+5V Supply (Pin 16)
0 to +6
Volts
Digital Inputs (Pins 11, 12)
–0.3 to +VDD +0.3
Volts
Analog Inputs (Pins 3, 4)
±12
Volts
Lead Temp. (10 seconds)
300
°C
Operating Temp. Range, Case
CDS-1401MC
0
+70
°C
CDS-1401MM
–55
+125
°C
Thermal Impedance
θjc
5
°C/W
θca
22
°C/W
Storage Temperature Range
–65
+150
°C
Package Type
Weight
24-pin, metal-sealed, ceramic DDIP
0.42 ounces(12 grams)
FUNCTIONAL SPECIFICATIONS
(TA = +25°C, ±Vcc = ±15V, +VDD = +5V, pixel rate = 1.25MHz, and a minimum warmup time of two minutes unless otherwise noted.)
ANALOG INPUTS Œ
MIN.
+25°C
TYP.
MAX.
0 to +70°C
MIN. TYP. MAX.
–55 to +125°C
MIN. TYP. MAX.
Input Voltage Range
Input Resistance
Input Capacitance
±10
±10
±10
1000
1000
1000
7
15
7
15
7
15
DIGITAL INPUTS
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
+2
+2
+2
+0.8
+0.8
+0.8
+10
+10
+10
–10
–10
–10
PERFORMANCE
Sample Mode Offset Error - S/H1
Gain Error - S/H1
Pedestal - S/H1
Sample Mode Offset Error - S/H2
Gain Error - S/H2
Pedestal - S/H2
Sample Mode Offset Error - CDS
Differential Gain Error - CDS
Pedestal - CDS
Pixel Rate (14-bit settling) 
Input Bandwidth, ±5V
Small Signal (–20dB input)
Large Signal (–0.5dB input)
Slew Rate
Aperture Delay Time
Aperture Uncertainty
S/H Acquisition Time 
(to ±0.003%, 10V step)
Hold Mode Settling Time
(to ±0.15mV)
Noise
Feedthrough Rejection
Overvoltage Recovery Time
S/H Saturation Voltage
Droop Rate
±1
±10
±0.2
±1
±15
±35
±1
±10
±0.2
±1
±15
±35
±1
±10
±0.25
±1
±15
±35
1.25
±2
±10
±0.25
±1
±15
±35
±2
±10
±0.25
±1
±15
±35
±2
±10
±0.3
±1
±15
±35
1.25
7
5
±80
10
5
7
5
±80
10
5
340
400
350
400
TBD
TBD
200
200
72
72
400
400
±12.5
±12.5
±0.004 ±0.02
±0.4
±2
±4
±10
±0.3
±1.5
±15
±35
±4
±10
±0.3
±1.5
±15
±35
±4
±10
±0.35
±1.5
±15
±35
1.25
7
5
±80
10
5
350
400
TBD
200
72
400
±12.5
±0.8
±4
ANALOG OUTPUTS Ž
Output Voltage Range
Output Impedance
Output Current
±10
±10
±10
0.5
0.5
0.5
±20
±20
±20
DIGITAL OUTPUTS
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
+3.9
+3.9
+3.9
+0.4
+0.4
+0.4
–4
–4
–4
+4
+4
+4
Œ Pins 3 and 4.  See Figure 4 for relationship between input voltage, accuracy, and acquisition time. Ž Pins 6 and 22.
UNITS
Volts
Ohms
pF
Volts
Volts
µA
µA
mV
%
mV
mV
%
mV
mV
%
mV
MHz
MHz
MHz
V/µs
ns
ps rms
ns
ns
µVr ms
dB
ns
Volts
mV/µs
Volts
Ohms
mA
Volts
Volts
mA
mA
2

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]