MK2014A Просмотр технического описания (PDF) - Integrated Circuit Systems
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MK2014A Datasheet PDF : 4 Pages
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I CR O C LOC K
MK2014A
Fast Ethernet Clock Source
Pin Assignment
X1/ICLK
VDD
GND
25M
1
8
2
7
3
6
4
5
8 pin SOIC
Suggested Layout
X2
14M
20M
V
0.1µF
GND
G
14.3 MHz in
(crystal caps not
shown)
Pin 1 8
2
7
3
6
5
4
14.3MHz
out
33Ω (optional) 20MHz
out
33Ω (optional)
33Ω (optional)
Pin Descriptions
25MHz out
Number
1
2
3
4
5
6
7
8
Name
X1/ICLK
VDD
GND
25M
GND
20M
14M
X2
Type
XI
P
P
O
P
O
O
XO
Description
Crystal Connection. Connect to a 14.31818 MHz crystal or clock.
Connect to +5V.
Connect to ground.
25.000 MHz clock output.
Connect to ground.
20.000 MHz clock output.
14.31818 MHz buffered crystal clock output.
Crystal Connection to a 14.31818 MHz crystal, or leave unconnected for clock input.
Key: I = Input, O = output, P = power supply connection
External Components/Crystal Selection
A minimum number of external components are required for proper oscillation. A decoupling capacitor of
0.1 µF should be connected between VDD and GND on pins 2 and 3, and 33 Ω terminating resistors
should be used on clock outputs with traces longer than 1 inch. For a clock input, connect to X1 and leave
X2 unconnected. For a crystal input, a parallel resonant 14.31818 MHz crystal is recommended. The
frequency accuracy of the crystal should be 30 ppm or better. External capacitors from each of the X1 and
X2 pins to ground should be added with a value in pF equal to (CL-13)*2, where CL is the crystal load
capacitance in pF. So for a crystal with load capacitance of 16 pF, 6 pF capacitors should be used. [Note
that the MK2014S required crystal load capacitors of (CL-4)*2.]
MDS 2014A B
2
Revision 121598
Printed 11/15/00
MicroClock Division of ICS • 525 Race Street • San Jose • CA • 95126•(408)295-9800tel•(408)295-9818fax
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