AN8007 Просмотр технического описания (PDF) - Panasonic Corporation
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AN8007 Datasheet PDF : 7 Pages
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s Absolute Maximum Ratings (Ta=25˚C)
Parameter
Symbol
Rating
Unit
Supply voltage
VI
20
V
Supply current
Power dissipation
ICC
100
mA
PD
650 *
mW
Operating ambient temperature
Topr
–30 to+80
˚C
AN8000 Series
–55 to+150
Storage temperature
Tstg
˚C
AN8000M Series
–55 to+125
* Mounting onto the PCB (20 × 20 × 1.7mm glass epoxy copper foil 1 cm2 or more), for AN8000M Series.
s Electrical Characteristics (Ta=25˚C)
· AN8002/AN8002M (2V Type)
Parameter
Symbol
Condition
min typ max Unit
Output voltage
Line regulation
Load regulation
VO
REGIN
REGL
Tj=25˚C
VI=2.5 to 8V, Tj=25˚C
IO=1 to 40mA, Tj=25˚C
IO=1 to 50mA, Tj=25˚C
1.92
2 2.08
V
2
40 mV
7
20 mV
10
25 mV
Minimum I/O voltage difference
VDIF (min.)
VI=1.9V, IO=20mA, Tj=25˚C
VI=1.9V, IO=50mA, Tj=25˚C
0.06
0.2
V
0.12
0.3
V
Bias current
Ibias
IO=0mA, Tj=25˚C
0.6
1 mA
Ripple rejection ratio
Output noise voltage
Output voltage temperature coefficient
RR
Vno
∆VO/Ta
VI=3 to 5V, f=120Hz
f=10Hz to 100kHz
Tj=–30 to+125˚C
62
74
60
0.1
dB
µV
mV/˚C
Note1) The specified condition Tj=25˚C means that the test should be conducted with each test time reduced (within 10ms) so that
the drift in characteristic value due to a temperature rise at chip junction can be ignored.
Note2) Unless otherwise specified, VI=3V, IO=20mA, CO=10µF
· AN8025/AN8025M (2.5V Type)
Parameter
Symbol
Condition
min typ max Unit
Output voltage
Line regulation
Load regulation
VO
REGIN
REGL
Tj=25˚C
VI=3 to 8.5V, Tj=25˚C
IO=1 to 40mA, Tj=25˚C
IO=1 to 50mA, Tj=25˚C
2.4
2.5
2.5
8
12.5
2.6
V
50 mV
20 mV
25 mV
Minimum I/O voltage difference
VDIF (min.)
VI=2.4V, IO=20mA, Tj=25˚C
VI=2.4V, IO=50mA, Tj=25˚C
0.07 0.2
V
0.12 0.3
V
Bias current
Ripple rejection ratio
Output noise voltage
Output voltage temperature coefficient
Ibias
RR
Vno
∆VO/Ta
IO=0mA, Tj=25˚C
VI=3.5 to 5.5V, f=120Hz
f=10Hz to 100kHz
Tj=–30 to+125˚C
0.6
60
72
65
0.13
1 mA
dB
µV
mV/˚C
Note1) The specified condition Tj=25˚C means that the test should be conducted with each test time reduced (within 10ms) so that
the drift in characteristic value due to a temperature rise at chip junction can be ignored.
Note2) Unless otherwise specified, VI=3.5V, IO=20mA, CO=10µF
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