AN-960 Просмотр технического описания (PDF) - Analog Devices

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AN-960

RS-485/RS-422 Circuit Implementation Guide

Analog Devices 

APPLICATION NOTE

MICRO-

PROCESSOR

AND

UART

RO

R

RE

DE

DI

D

VCC

A R1

RT

B

R2

GND

Figure 9. Fail-Safe Biasing Circuit

RECEIVER OUTPUT STATE

LOGIC 0

LOGIC 1

+200mV

0V

–200mV

VOH

FAIL SAFE

NOISE MARGIN

TIME

RECEIVER

OUTPUT

UNDEFINED

VOL

TIME

Figure 10. Differential Input Voltage and the Receiver Output State

True Fail-Safe Receivers

New generation RS-485 transceivers have an improved feature

that includes true fail-safe receiver inputs. This eliminates the

need for pull-up/pull-down resistors as shown in the previous

example. If a transceiver is specified to have a true fail-safe

feature this means that, the differential input threshold voltage

(VTH) has been adjusted from ±200 mV to −200 mV to −30 mV

(see Figure 11).

AN-960

During the bus idle condition, VIA – VIB = 0 and therefore is

larger than −30 mV, resulting in the receiver output being high

(RO = 1). This means that if all transceivers connected to the

bus have true fail-safe features, the receiver output is always

defined. See Figure 12 for a graph of the bus states and

differential input voltage.

STANDARD

RS-485 RECEIVER

TRUE

FAIL-SAFE

RS-485 RECEIVER

0.4

LOGIC 1

0.2

0

–0.03

–0.2

UNDEFINED

–0.4

LOGIC 0

LOGIC 1

UNDEFINED

LOGIC 0

Figure 11. Input Threshold Voltage

RECEIVER OUTPUT STATE

LOGIC 0

LOGIC 1

0V

–30mV

–200mV

OPEN/SHORT

FAIL SAFE

RECEIVER

OUTPUT

UNDEFINED

VOH

TIME

VOL

TIME

Figure 12. Differential Input Voltage and Receiver Output State

Rev. 0 | Page 7 of 12

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