LC8954 Просмотр технического описания (PDF) - SANYO -> Panasonic
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LC8954 Datasheet PDF : 7 Pages
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LC8954
Electrical Characteristics
DC Characteristics at Ta = –30 to +70°C, VSS = 0 V, VDD = 4.5 to 5.5 V
Parameter
Symbol
Conditions
min
Input high level voltage
TTL level: all input pins other than (1), (2),
VIH1
and EXTAL
2.2
Input low level voltage
TTL level: all input pins other than (1), (2),
VIL1
and EXTAL
Input high level voltage
Input low level voltage
Input high level voltage
Input low level voltage
Output high level voltage
VIH2
TTL level, Schmitt: (1)
2.5
VIL2
TTL level, Schmitt: (1)
VIH3
TTL level, built-in pull-up resistor: (2)
2.5
VIL3
TTL level, built-in pull-up resistor: (2)
VOH1
IOH = –3 mA: All output pins other than
(3), (4) and XTAL
3.5
Output low level voltage
VOL1
IOH = 3 mA: All output pins other than
(3), (4) and XTAL
Output high level voltage
Output low level voltage
Output low level voltage
VOH2
IOH = –6 mA: (3)
2.4
VOL2
IOL = 6 mA: (3)
VOL3
IOL = 3 mA, open drain, built-in pull-up
resistor: (4)
Input leakage current
Output leakage current
IL
V1 = VSS, VDD: All input pins other than (2)
–25
When in high impedance output mode:
IOZ
CDPORT0, CDPORT1, and D0 to D15
–100
Pull-up resistance
RUP
(2), (4)
10
Note: (1) WFCK, SBSO, SCOR, ZRESET, ZUDS, ZLDS, ZAS, R/W, ZACK0, ZACK1, ZRD, ZWR, ZCS
(2) SD0 to 7, IO0 to 7, ERA, ZDONE
(3) ZDTACK, D0 to 15
(4) ZINT, ZDONE, ZHINT0, ZHINT1
Ratings
typ
Unit
max
V
0.8
V
V
0.6
V
V
0.6
V
V
0.4
V
V
0.4
V
0.4
V
+25
µA
+100
µA
20
40
kΩ
Pin Assignment
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Pin
VDD
MSTEMON
MEMPHAS
MBITSPL
MSPLFRQ
OLRCK
ODATA
OBCLK
SOC1
DACCK
RA0
RA1
RA2
RA3
RA4
RA5
VSS
RA6
RA7
RA8
RA9
RA10
RA11
RA12
ADPCLK
Type
P
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
P
O
O
O
O
O
O
O
I
Type: I: Input pin, O: Output pin, B: Bi-directional pin, P: Power supply pin
Function
Audio block monitor
D/A converter output
Output corresponding to the LC78835 or LC78835M
16.9344 MHz (level A or B) or 8.4672 MHz (level C) output
RAM address outputs
RAM address outputs
AD PCM block clock input
Continued on next page.
No. 4127-4/7
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