ADV7123JST240(RevB) Просмотр технического описания (PDF) - Analog Devices
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ADV7123JST240 Datasheet PDF : 20 Pages
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ADV7123–SPECIFICATIONS
5 V SPECIFICATIONS (VAA = 5 V ؎ 5%, VREF = 1.235 V, RSET = 560 ⍀, CL = 10 pF. All specifications TMIN to TMAX1, unless other-
wise noted, TJ MAX = 110؇C.)
Parameter
Min Typ Max
Unit
Test Conditions1
STATIC PERFORMANCE
Resolution (Each DAC)
Integral Nonlinearity (BSL)
Differential Nonlinearity
10
–1
± 0.4 +1
–1
± 0.25 +1
Bits
LSB
LSB
Guaranteed Monotonic
DIGITAL AND CONTROL INPUTS
Input High Voltage, VIH
Input Low Voltage, VIL
Input Current, IIN
PSAVE Pull-Up Current
Input Capacitance, CIN
ANALOG OUTPUTS
Output Current
DAC to DAC Matching
Output Compliance Range, VOC
Output Impedance, ROUT
Output Capacitance, COUT
Offset Error
Gain Error2
2
–1
20
10
2.0
2.0
1.0
0
100
10
–0.025
–5.0
0.8
+1
26.5
18.5
5
1.4
+0.025
+5.0
V
V
µA
µA
pF
mA
mA
%
V
kΩ
pF
% FSR
% FSR
VIN = 0.0 V or VDD
Green DAC, Sync = High
RGB DAC, Sync = Low
IOUT = 0 mA
Tested with DAC Output = 0 V
FSR = 17.62 mA
VOLTAGE REFERENCE (Ext. and Int.)
Reference Range, VREF
1.12
POWER DISSIPATION
Digital Supply Current3
Analog Supply Current
Standby Supply Current4
Power Supply Rejection Ratio
1.235 1.35
3.4
9
10.5 15
18
25
67
72
8
2.1
5.0
0.1
0.5
V
mA
mA
mA
mA
mA
mA
%/%
fCLK = 50 MHz
fCLK = 140 MHz
fCLK = 240 MHz
RSET = 560 Ω
RSET = 4933 Ω
PSAVE = Low, Digital, and Control
Inputs at VDD
NOTES
1Temperature range TMIN to TMAX: –40°C to +85°C at 50 MHz and 140 MHz, 0°C to 70°C at 240 MHz and 330 MHz.
2Gain error = {(Measured (FSC)/Ideal (FSC) –1) × 100}, where Ideal = VREF /RSET × K × (3FFH) and K = 7.9896.
3Digital supply is measured with continuous clock with data input corresponding to a ramp pattern and with an input level at 0 V and V DD.
4These maximum/minimum specifications are guaranteed by characterization to be over the 4.75 V to 5.25 V range.
Specifications subject to change without notice.
–2–
REV. B
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