ADUM5400(Rev0) Просмотр технического описания (PDF) - Analog Devices
Номер в каталоге
Компоненты Описание
производитель
ADUM5400 Datasheet PDF : 16 Pages
| |||
ADuM5400
Parameter
Symbol Min
ADuM5400CRWZ
Minimum Pulse Width6
PW
Maximum Data Rate
25
Propagation Delay
tPHL, tPLH
Pulse Width Distortion, |tPLH − tPHL| PWD
Change vs. Temperature
Propagation Delay Skew
tPSK
Channel-to-Channel Matching,
Codirectional Channels
tPSKCD
Channel-to-Channel Matching,
Opposing Directional Channels
tPSKOD
For All Models
Output Rise/Fall Time (10% to 90%) tR/tF
Common-Mode Transient Immunity |CMH|
25
at Logic High Output
Common-Mode Transient Immunity |CML|
25
at Logic Low Output
Refresh Rate
fr
Typ
Max
Unit Test Conditions/Comments
40
ns
CL = 15 pF, CMOS signal levels
Mbps CL = 15 pF, CMOS signal levels
45
60
ns
CL = 15 pF, CMOS signal levels
6
ns
CL = 15 pF, CMOS signal levels
5
ps/°C CL = 15 pF, CMOS signal levels
15
ns
CL = 15 pF, CMOS signal levels
6
ns
CL = 15 pF, CMOS signal levels
15
ns
CL = 15 pF, CMOS signal levels
2.5
ns
CL = 15 pF, CMOS signal levels
35
kV/μs VIx = VDD or VISO, VCM = 1000 V,
transient magnitude = 800 V
35
kV/μs VIx = 0 V, VCM = 1000 V,
transient magnitude = 800 V
1.0
Mbps
1 The contributions of supply current values for all four channels are combined at identical data rates.
2 The VISO supply current is available for external use when all data rates are below 2 Mbps. At data rates above 2 Mbps, the data I/O channels draw additional current
proportional to the data rate. Additional supply current associated with an individual channel operating at a given data rate can be calculated as described in the
Power Consumption section. The dynamic I/O channel load must be treated as an external load and included in the VISO power budget.
3 The power demands of the quiescent operation of the data channels cannot be separated from the power supply section. Efficiency includes the quiescent power
consumed by the I/O channels as part of the internal power consumption.
4 This current is available for driving external loads at the VISO pin. All channels are simultaneously driven at a maximum data rate of 25 Mbps with full capacitive load
representing the maximum dynamic load conditions. Refer to the Power Consumption section for calculation of available current at less than the maximum data rate.
5 Undervoltage lockout (UVLO) holds the outputs in a low state if the corresponding input or output power supply is below the referenced threshold. Hysteresis is built
into the detection threshold to prevent oscillations and noise sensitivity.
6 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.
Rev. 0 | Page 4 of 16
Share Link: 