74LVC821APW Просмотр технического описания (PDF) - Unspecified

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74LVC821APW

10-bit D-type flip-flop with 5 V tolerant inputs/outputs; positive-edge trigger; 3-state

Unspecified 

Philips Semiconductors

5. Functional diagram

74LVC821A

10-bit D-type flip-flop with 5 V tolerant inputs/outputs

2 D0

3 D1

4 D2

5 D3

6 D4

FF0

7 D5

to

FF9

8 D6

9 D7

10 D8

11 D9

13 CP

1 OE

Fig 1. Functional diagram.

13

CP

2 D0

Q0 23

3 D1

Q1 22

4 D2

Q2 21

5 D3

Q3 20

6 D4

19

Q4

7 D5

18

Q5

8

D6

17

Q6

9 D7

16

Q7

10

D8

15

Q8

11

D9

14

Q9

OE

1

001aaa677

Fig 2. Logic symbol.

3-STATE

OUTPUTS

Q0 23

Q1 22

Q2 21

Q3 20

Q4 19

Q5 18

Q6 17

Q7 16

Q8 15

Q9 14

001aaa679

13

C1

1 EN

2 1D

23

3

22

4

21

5

20

6

19

7

18

8

17

9

16

10

15

11

14

001aaa678

Fig 3. IEC logic symbol.

9397 750 13276

Product data sheet

Rev. 03 — 11 May 2004

© Koninklijke Philips Electronics N.V. 2004. All rights reserved.

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