74LVC821A Просмотр технического описания (PDF) - Unspecified
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74LVC821A Datasheet PDF : 20 Pages
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Philips Semiconductors
74LVC821A
10-bit D-type flip-flop with 5 V tolerant inputs/outputs
3. Quick reference data
Table 1: Quick reference data
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns.
Symbol Parameter
Conditions
Min Typ Max Unit
tPHL, tPLH
tPZH, tPZL
tPHZ, tPLZ
fmax
CI
CPD
propagation delay CP to Qn
3-state output enable time OE to Qn
3-state output disable time OE to Qn
maximum clock frequency
input capacitance
power dissipation capacitance per gate
CL = 50 pF; VCC = 3.3 V
CL = 50 pF; VCC = 3.3 V
CL = 50 pF; VCC = 3.3 V
CL = 50 pF; VCC = 3.3 V
VCC = 3.3 V
outputs enabled
-
-
-
-
-
[1] [2]
-
3.7 -
3.5 -
3.0 -
200 -
5.0 -
17
-
ns
ns
ns
MHz
pF
pF
outputs disabled
-
11
-
pF
[1] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = total load switching outputs;
Σ (CL × VCC2 × fo) = sum of the outputs.
[2] The condition is VI = GND to VCC.
4. Ordering information
Table 2: Ordering information
Type number Package
Temperature range
74LVC821AD −40 °C to +125 °C
74LVC821ADB −40 °C to +125 °C
74LVC821APW −40 °C to +125 °C
74LVC821ABQ −40 °C to +125 °C
Name
Description
Version
SO24
plastic small outline package; 24 leads; body width SOT137-1
7.5 mm
SSOP24
plastic shrink small outline package; 24 leads; body SOT340-1
width 5.3 mm
TSSOP24 plastic thin shrink small outline package; 24 leads; SOT355-1
body width 4.4 mm
DHVQFN24 plastic dual in-line compatible thermal enhanced SOT815-1
very thin quad flat package; no leads; 24 terminals;
body 3.5 × 5.5 × 0.85 mm
9397 750 13276
Product data sheet
Rev. 03 — 11 May 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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