74LV259DB Просмотр технического описания (PDF) - NXP Semiconductors.
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74LV259DB Datasheet PDF : 19 Pages
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NXP Semiconductors
74LV259
8-bit addressable latch
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
Description
74LV259N
−40 °C to +125 °C DIP16
plastic dual in-line package; 16 leads (300 mil)
74LV259D
−40 °C to +125 °C SO16
plastic small outline package; 16 leads;
body width 3.9 mm
74LV259DB
−40 °C to +125 °C SSOP16
plastic shrink small outline package; 16 leads;
body width 5.3 mm
74LV259PW
−40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
74LV259BQ
−40 °C to +125 °C
DHVQFN16 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 16 terminals;
body 2.5 × 3.5 × 0.85 mm
Version
SOT38-4
SOT109-1
SOT338-1
SOT403-1
SOT763-1
4. Functional diagram
14
LE
Q0 4
13 D
Q1 5
Q2 6
Q3 7
1 A0 Q4 9
2 A1 Q5 10
3 A2 Q6 11
Q7 12
MR
Fig 1. Logic symbol
15
001aah118
15
G8
13
Z9
DX
9,10D
1 C10
4
0
8R
1
0
2
3
G
0
7
1
14
2
2
5
6
3
7
4
9
5
10
6
11
7
12
001aah119
Fig 2. IEC logic symbol
74LV259_3
Product data sheet
Rev. 03 — 2 January 2008
© NXP B.V. 2008. All rights reserved.
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