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USBDFXXW5(2000) Просмотр технического описания (PDF) - STMicroelectronics

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Компоненты Описание
производитель
USBDFXXW5
(Rev.:2000)
ST-Microelectronics
STMicroelectronics ST-Microelectronics
USBDFXXW5 Datasheet PDF : 9 Pages
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USBDFxxW5
Fig. A6: Remaining voltage at both stages S1 (Vinput) and S2 (Voutput) during ESD surge.
a. Positive surge
b.Negative surge
Please note that the USBDFxxW5 is not only acting for positive ESD surges but also for negative ones. For
these kinds of disturbances it clamps close to ground voltage as shown in Fig. A6b.
LATCH-UP PHENOMENA
The early ageing and destruction of IC’s is often due to latch-up phenomena which is mainly induced by
dV/dt. Thanks to its structure, the USBDFxxW5 provides a high immunity to latch-up phenomena by
smoothing very fast edges.
CROSSTALK BEHAVIOR
Fig. A7: Crosstalk phenomena
RG1
Line 1
VG1
RG2
Line 2
RL1
α1 VG1 + β12 VG2
VG2
RL2
α2 VG2 + β21 VG1
DRIVERS
RECEIVERS
The crosstalk phenomena is due to the coupling between 2 lines. The coupling factor ( β12 or β21 ) increases
when the gap across lines decreases, this is the reason why we provide crosstalk measurements for
monolithic device to guarantee negligeable crosstalk between the lines. In the example above the ex-
pected signal on load RL2 is α2VG2, in fact the real voltage at this point has got an extra value β21VG1. This
part of the VG1 signal represents the effect of the crosstalk phenomenon of the line 1 on the line 2. This phe-
nomenon has to be taken into account when the drivers impose fast digital data or high frequency analog
signals in the disturbing line. The perturbed line will be more affected if it works with low voltage signal or
high load impedance (few k).
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