MT34013 Просмотр технического описания (PDF) - Aeroflex Corporation

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MT34013

EIGHT CHANNEL ARINC DECODER

Aeroflex Corporation 

MT34013

MAXIMUM RATINGS (Above which the useful life may be impaired)

Storage Temperature

Temperature (Ambient) under Bias

Supply Voltage VDD

DC Input Voltage

Output Current (Single O/P)

Output Current (Total O/P)

- 65ºC to +150ºC

- 55ºC to +125ºC

-0.3V to + 7V

-0.3 to VDD +0.3V

10mA

20mA

ELECTRICAL CHARACTERISTICS over operating range

PARAMETER

IOH

IOL

VIH

VIL

IIL

IOZ

CI

CI/O

ICC

DESCRIPTION

Output High Current

Output Low Current

Input High Voltage

Input Low Voltage

Input Load Current

Output Leakage Current

Input Capacitance

I/O Capacitance

Supply Current

TEST CONDITIONS

VOH=2.8V VDD= 4.5V

VOL=0.4V

VSS

0.4V<VO<VCC Output Disabled

Test Frequency = 1.0 MHZ

MIN

1.0

3.2

2.4

-0.3

-40

VCC = MAX. All inputs

HIGH, All inputs open.

TYP

2

7

MAX

VCC

0.8

40

40

2.6

9

10

UNITS

mA

mA

Volts

Volts

uA

uA

pF

pF

mA

ARINC 429 SERIAL INPUT INTERFACE

Interfaces are provided for 8 independent Arinc 429 serial input channels with sufficient digital storage to guarantee

no data is lost provided all 8 channels can be accessed within 230µS.

Channels 0,1 & 2 can be programmed for either high or low speed operation. Channels 3 to 7 are configured for

interfacing to low speed Arinc buses only.

Digital Filtering is incorporated on each decoder input port to prevent word corruption due to noise spikes. (The

duration of reject noise spikes is a function of the basic clock period).

Arinc have suggested that the number of labels available to the user can be increased by either using SDI bits 9 and 10

as extra label bits or by using port identification. Both of these techniques have been accommodated in the design.

DATA DETECTION AND WORD TESTS

Each channel is provided with a 32 bit shift register to hold one complete word. The three channels which are

selectable for either high or low speed operation are additionally provided with a 32 bit buffer register.

Each channel contains hardware to test the following parameters:-

(1) Word length of 32 bits.

(2) Parity:- odd on good words.

(3) Gap:- the presence of a 33rd bit is checked for and the output processing is achieved during the remaining

gap for a valid word.

(4) Interconnection fault (both I/P’s high).

VLSI COMPONENTS FOR ARINC 429 DATA TRANSMISSION SYSTEMS

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