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UDA1343TT Просмотр технического описания (PDF) - Philips Electronics

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производитель
UDA1343TT
Philips
Philips Electronics Philips
UDA1343TT Datasheet PDF : 36 Pages
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Philips Semiconductors
Economy audio CODEC with features
Preliminary specification
UDA1343TT
Decimation filter (ADC)
The decimation from 64fs to 1fs is performed in two stages.
The first stage realizes a 4th-order s----i-nx-----x- characteristic.
This filter decreases the sample rate by 16. The second
stage consists of 2 half-band filters and a recursive filter,
each decimating by a factor of 2.
Table 2 Digital decimation filter characteristics
ITEM
Pass-band ripple
Stop band
Dynamic range
Overall gain with 0 dB
input to the ADC
CONDITIONS
0 0.45fs
>0.55fs
0 0.45fs
DC
VALUE (dB)
±0.05
50
114
1.16
In the ADC path there is a volume control with a range of
0 dB to 66 dB and −∞ dB in 0.25 dB steps, and a cosine
roll-off soft mute.
Note: it should be noted that the digital output level is
inversely proportional to the ADC analog power supply.
This means that with a constant analog input level and
increasing analog power supply, the digital output level will
decrease proportionally.
Digital silence detector
The UDA1343 is equipped with a digital silence detector
on the digital data input. This detects whether a certain
amount of consecutive samples are 0. The status of the
digital silence detector can be read from the
microcontroller interface.
The number of samples can be set via the L3 interface to
3200, 4800, 9600 or 19600 samples.
Mute
Muting the DAC will result in a cosine roll-off soft mute,
using 32 × 4 = 128 samples (at 44.1 kHz this is 3 ms). The
cosine roll-off curve is illustrated in Fig.3.
handbook, h1alfpage
mute
factor
0.8
0.6
0.4
MGS755
Overload detection (ADC)
In practice the output is used to indicate whenever the
output data, in either the left or right channel, is larger than
1 dB (the actual figure is 1.16 dB) of the maximum
possible digital swing. When this condition is detected the
OVERFL output (pin 9) is forced HIGH for at least 512fs
cycles (11.6 ms at fs = 44.1 kHz). This time-out is reset for
each infringement.
Interpolation filter (DAC)
The digital filter interpolates from 1 to 128fs by means of a
cascade of a recursive filter and an FIR filter.
Table 3 Digital interpolation filter characteristics
ITEM
Pass-band ripple
Stop band
Dynamic range
Gain
CONDITIONS
0 0.45fs
>0.55fs
0 0.45fs
DC
VALUE (dB)
±0.03
65
116.5
3.5
0.2
0
0
1
2 t (ms) 3
Fig.3 Mute as a function of raised cosine roll-off.
Double speed
SInce the device supports a sampling range of
8 to 110 kHz, the device can support double speed (e.g.
for 44.1 kHz and 48 kHz) by just doubling the system
speed. In double speed all features are available.
2000 Jan 12
8

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