UDA1343TT Просмотр технического описания (PDF) - Philips Electronics
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UDA1343TT Datasheet PDF : 36 Pages
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Philips Semiconductors
Economy audio CODEC with features
Preliminary specification
UDA1343TT
POLARITY CONTROL OF THE DAC
A 1-bit value to program the DAC output polarity.
Table 10 Polarity control of the DAC
POLINV DAC
0
1
FUNCTION
DAC output is not inverting
DAC output is inverting
POLARITY CONTROL OF THE ADC
A 1-bit value to program the ADC output polarity.
Table 11 Polarity control of the ADC
POLINV ADC
0
1
FUNCTION
ADC output is not inverting
ADC output is inverting
Table 12 Power control of the DAC
PON DAC
0
1
FUNCTION
DAC powered down
DAC powered up
SYSTEM CLOCK SETTINGS
A 2-bit value (SC1 and SC0) to select the required
external clock frequency (see Table 13).
Table 13 System clock frequency settings
SC1
SC0
0
0
0
1
1
0
1
1
FUNCTION
512fs
384fs
256fs
POWER CONTROL OF THE DAC
A 1-bit value to program the power setting of the DAC.
DATA INPUT FORMAT
A 3-bit value (SFOR3 to SFOR0) to select the required
data format (see Table 14).
Table 14 : Data input format settings
SFOR3
0
0
0
0
0
0
0
0
1
1
1
SFOR2
0
0
0
0
1
1
1
1
0
0
:
SFOR1
0
0
1
1
0
0
1
1
0
0
:
SFOR0
0
1
0
1
0
1
0
1
0
1
:
FUNCTION
I2S-bus
LSB-justified; 16 bits
LSB-justified; 18 bits
LSB-justified; 20 bits
MSB-justified
MSB-justified output/LSB-justified 16 bits input
MSB-justified output/LSB-justified 18 bits input
MSB-justified output/LSB-justified 20 bits input
MSB justified output/ LSB-justified 24 bits input
LSB justified, 24 bits
other codes are reserved for future use
MIXER SETTING
A 1-bit value to enable or disable the digital mixer (for mixing the ADC signal to the playback signal).
Table 15 Mixer setting
MIX
0
1
FUNCTION
mixer disabled
mixer enabled
2000 Jan 12
19
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