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L3 wake-up pulse after power-up
L3CLOCK
L3MODE
L3DATA
01
device address
register address
0
DOM bits
write
data byte 1
Fig.8 Data write mode for L3 version 2.
data byte 2
MGS753
L3CLOCK
L3MODE
device address
register address
L3DATA 0 1
1
DOM bits
read
prepare read
11
register address
0/1
valid / non-valid
data byte 2
send by the device
data byte 2
MGL890
Fig.9 Data read mode for L3 version 2.