UDA1343 Просмотр технического описания (PDF) - Philips Electronics
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UDA1343 Datasheet PDF : 36 Pages
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Table 9 L3 register mapping including default register settings; bits D7 to D0
REG
NUM
FUNCTION
D7
D6
D5
D4
D3
D2
D1
D0
Writable and readable registers
00H system setting
SFOR3
SFOR2
SFOR1
SFOR0
MIX
0
1
0
0
0
0
0
11H MASTER volume
control
12H silence detector
ADC output select
13H ADC volume
I2S-bus mixer volume
14H mute
de-emphasis
VC7
0
0
VC-IIS7
0
0
VC6
0
0
VC-IIS16
0
0
VC5
0
0
VC-IIS5
0
0
VC4
0
0
VC-IIS4
0
0
VC3
0
0
VC-IIS3
0
0
VC2
0
SDET1
0
VC-IIS2
0
DE2
0
VC1
0
SDET0
0
VC-IIS1
0
DE1
0
VC0
0
SDET_on
1
VC-IIS0
0
DE0
0
20H ADC settings
PGAL3
0
PGAL2
0
PGAL1
0
PGAL0
0
PGAR3
0
PGAR2
0
PGAR1
0
PGAR0
0
7FH software reset
Readable registers
18H interpolator
SDET-IIS-R SDET-IIS-L
MTM state
MT-ADC MT-IIS state
state
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