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X40014S8I-B Просмотр технического описания (PDF) - Xicor -> Intersil

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X40014S8I-B Datasheet PDF : 25 Pages
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X40010/X40011/X40014/X40015 – Preliminary
threshold for either voltage monitor to be repro-
grammed to meet special needs or to fine-tune the
threshold for applications requiring higher precision.
The Watchdog Timer provides an independent protec-
tion mechanism for microcontrollers. When the micro-
controller fails to restart a timer within a selectable time
out interval, the device activates the WDO signal. The
user selects the interval from three preset values. Once
selected, the interval does not change, even after
cycling the power.
The device features a 2-wire interface and software
protocol allowing operation on an I2C® bus.
Dual Voltage Monitors
Device
X40010/11
-A
-B
-C
X40014/15
-A
-B
-C
Expected System Voltages
5V; 3V or 3.3V
5V; 3V
3V; 3.3V; 1.8V
3V; 3.3V; 1.5V
3V; 1.5V
3V or 3.3V; 1.1 or 1.2V
Vtrip1(V)
2.0–4.75*
4.55–4.65*
4.35–4.45*
2.85–2.95*
2.0–4.75*
2.85–2.95*
2.55–2.65*
2.85–2.95*
*Voltage monitor requires VCC to operation. Others are independent of VCC.
Vtrip2(V)
1.70–4.75
2.85–2.95
2.55–2.65
1.65–1.75
0.90–3.50*
1.25–1.35*
1.25–1.35*
0.95–1.05*
POR (system)
RESET = X40010
RESET = X40011
RESET = X40014
RESET = X40015
PIN CONFIGURATION
X40010/14, X40011/15
8-Pin SOIC
V2FAIL 1
V2MON 2
8 VCC
7 WDO
RESET/RESET 3
VSS 4
6 SCL
5 SDA
X40010/14, X40011/15
8-Pin TSSOP
WDO 1
VCC 2
V2FAIL 3
V2MON 4
8 SCL
7 SDA
6 VSS
5 RESET/RESET
PIN DESCRIPTION
Pin
SOIC TSSOP Name
Function
1
3 V2FAIL V2 Voltage Fail Output. This open drain output goes LOW when V2MON is less than VTRIP2 and
goes HIGH when V2MON exceeds VTRIP2. There is no power up reset delay circuitry on this pin.
2
4 V2MON V2 Voltage Monitor Input. When the V2MON input is less than the VTRIP2 voltage, V2FAIL goes
LOW. This input can monitor an unregulated power supply with an external resistor divider or can
monitor a second power supply with no external components. Connect V2MON to VSS or VCC
when not used.The V2MON comparator is supplied by V2MON (X40010/11) or by VCC Input
(X40014/15).
3
5 RESET/ RESET Output. (X40011/15) This is an active LOW, open drain output which goes active when-
RESET ever VCC falls below VTRIP1. It will remain active until VCC rises above VTRIP1 and for the tPURST
thereafter.
RESET Output. (X40010/14) This is an active HIGH CMOS output which goes active whenever
VCC falls below VTRIP1. It will remain active until VCC rises above VTRIP1 and for the tPURST there-
after.
4
6
VSS Ground
REV 1.3.4 7/12/02
www.xicor.com
Characteristics subject to change without notice. 2 of 25

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