MC100ELT22D Просмотр технического описания (PDF) - Motorola => Freescale

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MC100ELT22D

Dual TTL to Differential PECL Translator

Motorola => Freescale 

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Dual TTL to Differential

PECL Translator

The MC10ELT/100ELT22 is a dual TTL to differential PECL translator.

Because PECL (Positive ECL) levels are used only +5V and ground are

required. The small outline 8-lead SOIC package and the low skew, dual

gate design of the ELT22 makes it ideal for applications which require the

translation of a clock and a data signal. Because the mature MOSAIC 1.5

process is used, low cost can be added to the list of features.

The ELT22 is available in both ECL standards: the 10ELT is compatible

with positive MECL 10H logic levels while the 100ELT is compatible with

positive ECL 100K logic levels.

• 1.5ns Typical Propagation Delay

• <300ps Typical Output to Output Skew

• Differential PECL Outputs

• Small Outline SOIC Package

• PNP TTL Inputs for Minimal Loading

• Flow Through Pinouts

LOGIC DIAGRAM AND PINOUT ASSIGNMENT

Q0 1

Q0 2

PECL

Q1 3

8 VCC

7 D0

TTL

6 D1

Q1 4

5 GND

MC10ELT22

MC100ELT22

8

1

D SUFFIX

PLASTIC SOIC PACKAGE

CASE 751-05

PIN DESCRIPTION

PIN

Qn

Dn

VCC

GND

FUNCTION

Diff PECL Outputs

TTL Inputs

+5.0V Supply

Ground

7/96

© Motorola, Inc. 1996

3–1

REV 3

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