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T7502

Dual PCM Codec with Filters

Agere -> LSI Corporation 

T7502 Dual PCM Codec with Filters

Data Sheet

February 1998

Timing Characteristics

Table 14. Clock Section (See Figures 5 and 6.)

Symbol

tMCHMCL1

tCDC

tMCH1MCH2

tMCL2MCL1

Parameter

Clock Pulse Width

Duty Cycle, MC

Clock Rise and Fall Time

Test Conditions

—

—

—

Min Typ Max Unit

97

—

—

ns

40

—

60

%

0

—

15

ns

Table 15. Transmit Section (See Figures 5 and 6.)

Symbol

tMCHDV

tMCHDV1

tMCHDZ*

tFSHMCL

tMCLFSH

tFSLMCL

Parameter

Data Enabled on TS Entry

Data Delay from MC

Data Float on TS Exit

Frame-sync Hold Time

Frame-sync High Setup

Frame-sync Low Setup

Test Conditions Min Typ Max Unit

0 < CLOAD < 100 pF

0

—

60

ns

0 < CLOAD < 100 pF

0

—

60

ns

CLOAD = 0

10

—

100

ns

—

50

—

—

ns

—

50

—

—

ns

—

50

—

—

ns

* Timing parameter tMCHDZ is referenced to a high-impedance state.

Table 16. Receive Section (See Figures 5 and 6.)

Symbol

tDVMCL

tMCLDV

Parameter

Receive Data Setup

Receive Data Hold

Test Conditions

—

—

Min Typ Max Unit

30

—

—

ns

15

—

—

ns

10

Lucent Technologies Inc.

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