CA1524 Просмотр технического описания (PDF) - Intersil

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CA1524

Regulating Pulse Width Modulator

Intersil 

CA1524, CA2524, CA3524

of the output duty cycle as a function of the voltage at

terminal 9 are shown in Figure 7. To synchronize two or

more CAl524’s, one must be designated as master, with RT

CT set for the correct period. Each of the remaining units

(slaves) must have a CT of 1/2 the value used in the master

and approximately a 1010 longer RTCT period than the mas-

ter. Connecting terminal 3 together on all units assures that

the master output pulse, which occurs first and has a wider

pulse width, will reset the slave units.

TA = +25oC

105 V+ = 8V - 40V

CT = 0.001µF

CT = 0.002µF

CT = 0.005µF

104

CT = 0.02µF

CT = 0.05µF

CT = 0.1µF

103

1

CT = 0.01µF

10

102

103

104

OSCILLATOR PERIOD, t (µs)

FIGURE 5. TYPICAL OSCILLATOR PERIOD AS A FUNCTION

OF RT AND CT

Error AmplIfIer Section

The error amplifier consists of a differential pair (Q56,Q57)

with an active load (Q61 and Q62) forming a differential

transconductance amplifier. Since Q61 is driven by a

constant current source, Q62, the output impedance ROUT,

terminal 9, is very high (≅ 5MΩ).

The gain is:

AV = gmR = 8 lC R/2KT = 104,

where R =

ROUT RL

ROUT +

RL

, RL = ∞, AV ∝ 104

Since ROUT is extremely high, the gain can be easily

reduced from a nominal 104 (80dB) by the addition of an

external shunt resistor from terminal 9 to ground as shown in

Figure 6.

80

RL = ∞

70

RL = 3MΩ

OPEN LOOP GAIN

60 RL = 1MΩ

50 RL = 300kΩ

The output amplifier terminal is also used to compensate the

system for ac stability. The frequency response and phase

shift curves are shown in Figure 7. The uncompensated

amplifier has a single pole at approximately 250Hz and a

unity gain cross-over at 3MHz.

Since most output filter designs introduce one or more

additional poles at a lower frequency, the best network to

stabilize the system is a series RC combination at terminal9

to ground. This network should be designed to introduce a

zero to cancel out one of the output filter poles. A good start-

ing point to determine the external poles is a 1000-pF

capacitor and a variable series 50-KΩ potentiometer from

terminal 9 to ground. The compensation point is also a

convenient place to insert any programming signal to

override the error amplifier. internal shutdown and current

limiting are also connected at terminal 9. Any external circuit

that can sink 200µA can pull this point to ground and shut off

both output drivers.

While feedback is normally applied around the entire regula-

tor, the error amplifier can be used with conventional

operational amplifier feedback and will be stable in either the

inverting or non-inverting mode. Input common-mode limits

must be observed; if not, output signal inversion may result.

The internal 5V reference can be used for conventional regu-

lator applications if divided as shown in Figure 8. If the error

amplifier is connected as a unity gain amplifier, a fixed duty

cycle application results.

TA = +25oC

V+ = 20V

48

40

CT = 2700pF

RT = 6.19k

32

fOSC = 60kHz

24

CT =1000pF

16

RT = 5k

fOSC = 20kHz

8

0

0 0.4 0.8 1.2 1.6 2 2.4 2.8 3.2 3.6 4

COMPARATOR VOLTAGE (V)

FIGURE 7. TYPICAL DUTY CYCLE AS A FUNCTION OF

COMPARATOR VOLTAGE (AT TERMINAL 9).

1.1

1.0

40 RL =100kΩ

0.9

0o

90o

OPEN LOOP PHASE

50

10

102

103

104

105

FREQUENCY (Hz)

FIGURE 6. OPEN-LOOP ERROR AMPLIFIER RESPONSE

CHARACTERISTICS.

0.8

0.7

-75 -50 -25 0 25 50 75 100 125 150 175

AMBIENT TEMPERATURE (oC)

FIGURE 8. TYPICAL OUTPUT SATURATION VOLTAGE AS A

FUNCTION OF AMBIENT TEMPERATURE.

8

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