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LTC4440A-5

High Speed, High Voltage, High Side Gate Driver

Linear Technology 

LTC4440A-5

Applications Information

Power Dissipation

To ensure proper operation and long-term reliability,

the LTC4440A-5 must not operate beyond its maximum

temperature rating. Package junction temperature can be

calculated by:

TJ = TA + PD (θJA)

where:

nodal capacitances and cross-conduction currents in the

internal gates.

Undervoltage Lockout (UVLO)

The LTC4440A-5 contains an undervoltage lockout detec-

tor that monitors VCC. When VCC falls below 3.04V, the

internal buffer is disabled and the output pin TG is pulled

down to TS.

TJ = Junction Temperature

TA = Ambient Temperature

PD = Power Dissipation

θJA = Junction-to-Ambient Thermal Resistance

Power dissipation consists of standby and switching

power losses:

PD = PSTDBY + PAC

where:

PSTDBY = Standby Power Losses

PAC = AC Switching Losses

The LTC4440A-5 consumes very little current during

standby. The DC power loss at VCC = 6V and VBOOST–TS =

6V is only (200µA)(6V) = 1.2mW with INP = 0V.

AC switching losses are made up of the output capacitive

load losses and the transition state losses. The capacitive

load losses are primarily due to the large AC currents

needed to charge and discharge the load capacitance dur-

ing switching. Load losses for the output driver driving a

pure capacitive load COUT would be:

Load Capacitive Power = (COUT)(f)(VBOOST–TS)2

The power MOSFET’s gate capacitance seen by the driver

output varies with its VGS voltage level during switching.

A power MOSFET’s capacitive load power dissipation can

be calculated using its gate charge, QG. The QG value

corresponding to the MOSFET’s VGS value (VCC in this

case) can be readily obtained from the manufacturer’s

QG vs VGS curves:

Load Capacitive Power (MOS) = (VBOOST–TS)(QG)(f)

Transition state power losses are due to both AC currents

required to charge and discharge the driver’s internal

Bypassing and Grounding

The LTC4440A-5 requires proper bypassing on the VCC

and VBOOST–TS supplies due to its high speed switching

(nanoseconds) and large AC currents (Amperes). Careless

component placement and PCB trace routing may cause

excessive ringing and under/overshoot.

To obtain the optimum performance from the LTC4440A-5:

A. Mount the bypass capacitors as close as possible

between the VCC and GND pins and the BOOST and

TS pins. The leads should be shortened as much as

possible to reduce lead inductance.

B. Use a low inductance, low impedance ground plane

to reduce any ground drop and stray capacitance.

Remember that the LTC4440A-5 switches >2A peak

currents and any significant ground drop will degrade

signal integrity.

C. Plan the power/ground routing carefully. Know where

the large load switching current is coming from and

going to. Maintain separate ground return paths for

the input pin and the output power stage.

D. Keep the copper trace between the driver output pin

and the load short and wide.

E. When using the MS8E package, be sure to solder the

exposed pad on the back side of the LTC4440A-5 pack-

age to the board. Correctly soldered to a 2500mm2

double-sided 1oz copper board, the LTC4440A-5 has

a thermal resistance of approximately 40°C/W. Failure

to make good thermal contact between the exposed

back side and the copper board will result in thermal

resistances far greater than 40°C/W.

4440a5f

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For more information www.linear.com/LTC4440A-5

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